Re: [Qemu-devel] [PATCH v3 1/8] target/ppc: Optimize emulation of lvsl and lvsr instructions

2019-06-26 Thread Richard Henderson
On 6/21/19 1:07 PM, Stefan Brankovic wrote: > +#if defined(TARGET_PPC64) > +tcg_gen_andi_i64(sh, EA, 0xfULL); > +#else > +tcg_gen_ext_i32_i64(sh, EA); > +tcg_gen_andi_i64(sh, sh, 0xfULL); > +#endif Didn't see v3 before reviewing v2, however as noted there, tcg_gen_extu_tl_i64. r~

[Qemu-devel] [PATCH v3 1/8] target/ppc: Optimize emulation of lvsl and lvsr instructions

2019-06-21 Thread Stefan Brankovic
Adding simple macro that is calling tcg implementation of appropriate instruction if altivec support is active. Optimization of altivec instruction lvsl (Load Vector for Shift Left). Place bytes sh:sh+15 of value 0x00 || 0x01 || 0x02 || ... || 0x1E || 0x1F in destination register. Sh is calculated