Re: [Qemu-devel] [PATCH v3 15/18] target/s390x: Implement SRSTU

2017-06-23 Thread Aurelien Jarno
On 2017-06-19 17:04, Richard Henderson wrote: > Signed-off-by: Richard Henderson > --- > target/s390x/helper.h | 1 + > target/s390x/insn-data.def | 2 ++ > target/s390x/mem_helper.c | 44 > target/s390x/translate.c | 8 > 4 files c

Re: [Qemu-devel] [PATCH v3 15/18] target/s390x: Implement SRSTU

2017-06-20 Thread Richard Henderson
On 06/20/2017 01:27 AM, David Hildenbrand wrote: 2. We must not overwrite bit 0-31 in 24/31 bit mode: (PoP page 3-6) Unless specifically stated to the contrary, the follow- ing definition applies in this publication: whenever the machine generates and provides to the program a 24-bit or 31-bit a

Re: [Qemu-devel] [PATCH v3 15/18] target/s390x: Implement SRSTU

2017-06-20 Thread David Hildenbrand
> Apart from special wrapping conditions, looks good to me! > > (will scan the PoP how wrapping is to be handled in general during an > instruction. Some (like mvcos) mention it explicitly, others don't) > Answering my own questions: 1. We always have to wrap addresses that we generate except

Re: [Qemu-devel] [PATCH v3 15/18] target/s390x: Implement SRSTU

2017-06-20 Thread David Hildenbrand
> +uint64_t HELPER(srstu)(CPUS390XState *env, uint64_t end, uint64_t str) > +{ > +uintptr_t ra = GETPC(); > +uint32_t len; > +uint16_t v, c = env->regs[0]; > +uint64_t adj_end; > + > +/* Bits 32-47 of R0 must be zero. */ > +if (env->regs[0] & 0xu) { > +cpu_r

[Qemu-devel] [PATCH v3 15/18] target/s390x: Implement SRSTU

2017-06-19 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/s390x/helper.h | 1 + target/s390x/insn-data.def | 2 ++ target/s390x/mem_helper.c | 44 target/s390x/translate.c | 8 4 files changed, 55 insertions(+) diff --git a/target/s390x/helper.h