[Qemu-devel] [PATCH v3 7/9] add L2x0/PL310 cache controller device

2011-12-27 Thread Mark Langsdorf
From: Rob Herring rob.herr...@calxeda.com This is just a dummy device for ARM L2 cache controllers, based on the pl310. The cache type parameter can be defined by a property value and has a meaningful default. Signed-off-by: Rob Herring rob.herr...@calxeda.com Signed-off-by: Mark Langsdorf

Re: [Qemu-devel] [PATCH v3 7/9] add L2x0/PL310 cache controller device

2011-12-27 Thread Peter Maydell
On 27 December 2011 20:13, Mark Langsdorf mark.langsd...@calxeda.com wrote: +#define DEFAULT_CACHE_TYPE 0x19080800 Could use a comment saying what this actually is. As far as I can tell it's actually specifying an invalid I/D size for a PL310, which makes me suspicious of it. (I might have