Il 11/02/2014 00:53, Edgar E. Iglesias ha scritto:
Is there that much overhead to creating an AS per master? I guess
you end up recalculating the same memory flatview for every AS
when a memory region gets mapped or unmapped.
In any case, if it's OK to share AddressSpaces between masters
On 9 February 2014 22:15, Paolo Bonzini pbonz...@redhat.com wrote:
However, I'd prefer to first apply the patch to fix exec.c in order to keep
bisection as clean as possible.
Agreed; can you point me at the pullreq (or failing that, patches you
want me to apply) that fixes that?
thanks
-- PMM
Il 10/02/2014 10:23, Peter Maydell ha scritto:
On 9 February 2014 22:15, Paolo Bonzini pbonz...@redhat.com wrote:
However, I'd prefer to first apply the patch to fix exec.c in order to keep
bisection as clean as possible.
Agreed; can you point me at the pullreq (or failing that, patches you
On Sun, Feb 09, 2014 at 02:21:31PM +, Peter Maydell wrote:
On 9 February 2014 13:31, Andreas Färber afaer...@suse.de wrote:
Paolo,
Am 03.02.2014 10:44, schrieb Edgar E. Iglesias:
Edgar E. Iglesias (22):
exec: Make tb_invalidate_phys_addr input an AS
exec: Make iotlb_to_region
On 10 February 2014 23:10, Edgar E. Iglesias edgar.igles...@gmail.com wrote:
My thinking was in terms of trying to minimize the amount of
AS structures we create in cases were the nr of master outnumber
the nr of ASs. But there might be ways to achieve being light
even if we dont explicitely
On Mon, Feb 10, 2014 at 11:42:35PM +, Peter Maydell wrote:
On 10 February 2014 23:10, Edgar E. Iglesias edgar.igles...@gmail.com wrote:
My thinking was in terms of trying to minimize the amount of
AS structures we create in cases were the nr of master outnumber
the nr of ASs. But there
Paolo,
Am 03.02.2014 10:44, schrieb Edgar E. Iglesias:
Edgar E. Iglesias (22):
exec: Make tb_invalidate_phys_addr input an AS
exec: Make iotlb_to_region input an AS
exec: Always initialize MemorySection address spaces
exec: Make memory_region_section_get_iotlb use section AS
On 9 February 2014 13:31, Andreas Färber afaer...@suse.de wrote:
Paolo,
Am 03.02.2014 10:44, schrieb Edgar E. Iglesias:
Edgar E. Iglesias (22):
exec: Make tb_invalidate_phys_addr input an AS
exec: Make iotlb_to_region input an AS
exec: Always initialize MemorySection address spaces
Il 09/02/2014 15:21, Peter Maydell ha scritto:
Consider a board model which puts together some RAM and
devices. It ought to have the same interface for passing this
up to the CPU whether it's doing so directly or via some SoC
container device. For the SoC container case, this has to be
by
On 3 February 2014 09:44, Edgar E. Iglesias edgar.igles...@gmail.com wrote:
From: Edgar E. Iglesias edgar.igles...@xilinx.com
I'm looking at modeling systems where multiple CPUs co-exist with
different views of their attached buses/devs.
With this series I'm trying to take some steps towards
On Wed, Feb 05, 2014 at 06:44:56PM +, Peter Maydell wrote:
On 3 February 2014 09:44, Edgar E. Iglesias edgar.igles...@gmail.com wrote:
From: Edgar E. Iglesias edgar.igles...@xilinx.com
I'm looking at modeling systems where multiple CPUs co-exist with
different views of their attached
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Hi,
I'm looking at modeling systems where multiple CPUs co-exist with
different views of their attached buses/devs.
With this series I'm trying to take some steps towards having
an address-space per CPU. It's not complete but good enough for
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