On 08/08/2014 03:28 AM, Richard Henderson wrote:
On 08/07/2014 04:34 AM, Bastian Koppelmann wrote:
+/* PSW flag cache for faster execution
+ if flag != 0 then flag is set. Else flag is not set.
+*/
+target_ulong PSW_USB_C;
+target_ulong PSW_USB_V;
+target_ulong
On 08/08/2014 03:28 AM, Richard Henderson wrote:
On 08/07/2014 04:34 AM, Bastian Koppelmann wrote:
+/* PSW flag cache for faster execution
+ if flag != 0 then flag is set. Else flag is not set.
+*/
+target_ulong PSW_USB_C;
+target_ulong PSW_USB_V;
+target_ulong
On 08/08/2014 11:40 AM, Bastian Koppelmann wrote:
On 08/08/2014 03:28 AM, Richard Henderson wrote:
On 08/07/2014 04:34 AM, Bastian Koppelmann wrote:
+/* PSW flag cache for faster execution
+ if flag != 0 then flag is set. Else flag is not set.
+*/
+target_ulong PSW_USB_C;
+
Add TriCore target stubs, and QOM cpu.
Signed-off-by: Bastian Koppelmann kbast...@mail.uni-paderborn.de
---
v3 - v4:
- tricore_cpu_type_info changed to abstract.
- Change documentation of PSW_USB_AV and PSW_USB_SAV bit to only use bit 31.
- Change psw_read/_write to only use bit 31
On 08/07/2014 04:34 AM, Bastian Koppelmann wrote:
+/* PSW flag cache for faster execution
+ if flag != 0 then flag is set. Else flag is not set.
+*/
+target_ulong PSW_USB_C;
+target_ulong PSW_USB_V;
+target_ulong PSW_USB_SV;
+target_ulong PSW_USB_AV; /* Only
