Re: [Qemu-devel] [PATCH v4 05/22] target/mips: Add CPO PWField register

2018-10-12 Thread Aleksandar Markovic
> From: Yongbok Kim > > Add PWField register (CP0 Register 5, Select 6). > Please bump version_id and minimum_version_id of vmstate_mips_cpu in machine.c. Other than this: Reviewed-by: Aleksandar Markovic

[Qemu-devel] [PATCH v4 05/22] target/mips: Add CPO PWField register

2018-10-11 Thread Aleksandar Markovic
From: Yongbok Kim Add PWField register (CP0 Register 5, Select 6). The PWField register configures hardware page table walking for TLB refills. This register is required for the hardware page walker feature. It exists only if Config3 PW bit is set to 1. It contains following fields: GDI (29..