On Thu, Sep 1, 2011 at 8:45 PM, Max Filippov wrote:
> Sample board and sample CPU core are used for debug and may be used for
> development of custom SoC emulators.
>
> This board has two fixed size memory regions for DTCM and ITCM and
> variable length SRAM region.
>
> Signed-off-by: Max Filippov
Sample board and sample CPU core are used for debug and may be used for
development of custom SoC emulators.
This board has two fixed size memory regions for DTCM and ITCM and
variable length SRAM region.
Signed-off-by: Max Filippov
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Makefile.target|1 +
hw/xtensa_sample.c | 105 +++
