On Thu, 20 Oct 2016 12:15:07 -0200
Eduardo Habkost wrote:
> On Thu, Oct 20, 2016 at 03:27:50PM +0200, Igor Mammedov wrote:
> > On Thu, 20 Oct 2016 10:27:33 -0200
> > Eduardo Habkost wrote:
> >
> > > On Thu, Oct 20, 2016 at 01:27:34PM +0200, Igor
On Thu, Oct 20, 2016 at 10:27:33AM -0200, Eduardo Habkost wrote:
> (Why does SeaBIOS need to start the other CPUs, anyway, except
> for building the APIC ID list for the ACPI tables?)
SeaBIOS only starts the other CPUs when running on QEMU (it does not
on coreboot). The main reason is to
On Thu, Oct 20, 2016 at 03:27:50PM +0200, Igor Mammedov wrote:
> On Thu, 20 Oct 2016 10:27:33 -0200
> Eduardo Habkost wrote:
>
> > On Thu, Oct 20, 2016 at 01:27:34PM +0200, Igor Mammedov wrote:
> > > On Wed, 19 Oct 2016 16:29:29 -0200
> > > Eduardo Habkost
On Thu, 20 Oct 2016 10:27:33 -0200
Eduardo Habkost wrote:
> On Thu, Oct 20, 2016 at 01:27:34PM +0200, Igor Mammedov wrote:
> > On Wed, 19 Oct 2016 16:29:29 -0200
> > Eduardo Habkost wrote:
> >
> > > On Wed, Oct 19, 2016 at 05:18:38PM +0200, Igor
On Thu, Oct 20, 2016 at 01:27:34PM +0200, Igor Mammedov wrote:
> On Wed, 19 Oct 2016 16:29:29 -0200
> Eduardo Habkost wrote:
>
> > On Wed, Oct 19, 2016 at 05:18:38PM +0200, Igor Mammedov wrote:
> > > On Wed, 19 Oct 2016 11:15:46 -0200
> > > Eduardo Habkost
On Wed, 19 Oct 2016 16:29:29 -0200
Eduardo Habkost wrote:
> On Wed, Oct 19, 2016 at 05:18:38PM +0200, Igor Mammedov wrote:
> > On Wed, 19 Oct 2016 11:15:46 -0200
> > Eduardo Habkost wrote:
> >
> > > On Wed, Oct 19, 2016 at 02:05:41PM +0200, Igor
On Wed, Oct 19, 2016 at 05:18:38PM +0200, Igor Mammedov wrote:
> On Wed, 19 Oct 2016 11:15:46 -0200
> Eduardo Habkost wrote:
>
> > On Wed, Oct 19, 2016 at 02:05:41PM +0200, Igor Mammedov wrote:
> > > Currently firmware uses 1 byte at 0x5F offset in RTC CMOS
> > > to get
On Wed, 19 Oct 2016 11:15:46 -0200
Eduardo Habkost wrote:
> On Wed, Oct 19, 2016 at 02:05:41PM +0200, Igor Mammedov wrote:
> > Currently firmware uses 1 byte at 0x5F offset in RTC CMOS
> > to get number of CPUs present at boot. However 1 byte is
> > not enough to handle more
On Wed, Oct 19, 2016 at 02:05:41PM +0200, Igor Mammedov wrote:
> Currently firmware uses 1 byte at 0x5F offset in RTC CMOS
> to get number of CPUs present at boot. However 1 byte is
> not enough to handle more than 255 CPUs. So add a new
> fw_cfg file that would allow QEMU to tell it.
> For
Currently firmware uses 1 byte at 0x5F offset in RTC CMOS
to get number of CPUs present at boot. However 1 byte is
not enough to handle more than 255 CPUs. So add a new
fw_cfg file that would allow QEMU to tell it.
For compat reasons add file only for machine types that
support more than 255
10 matches
Mail list logo