On Wed, 21 Mar 2012, Zhang, Yang Z wrote:
> > > struct tm *tm = &s->current_tm;
> > > -int64_t host_usec, guest_sec, guest_usec;
> > > +int64_t host_usec, guest_sec, guest_usec, offset_usec,
> > > old_guest_usec;
> > >
> > > host_usec = qemu_get_clock_ns(host_clock) / NS_PER_USEC
l] [PATCH v4 4/7] RTC: Set internal millisecond
> register to
> 500ms when reset divider
>
> On Mon, 19 Mar 2012, Zhang, Yang Z wrote:
> > The first update cycle begins one - half seconds later when divider reset is
> removing.
> >
> > Signed-of
Il 20/03/2012 18:39, Stefano Stabellini ha scritto:
> This code is new: does it mean we were not handling divider reset
> correctly before?
> Also if we are trying to handle the DV registers, shouldn't we emulated
> the other RTC frequencies as well? If so, we need a scale factor, in
> addition to
On Mon, 19 Mar 2012, Zhang, Yang Z wrote:
> The first update cycle begins one - half seconds later when divider reset is
> removing.
>
> Signed-off-by: Yang Zhang
> ---
> hw/mc146818rtc.c | 38 +-
> 1 files changed, 33 insertions(+), 5 deletions(-)
>
> dif
The first update cycle begins one - half seconds later when divider reset is
removing.
Signed-off-by: Yang Zhang
---
hw/mc146818rtc.c | 38 +-
1 files changed, 33 insertions(+), 5 deletions(-)
diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index 6ebb8f6.
