From: Rob Herring
This is just a dummy device for ARM L2 cache controllers, based on the
pl310. The cache type parameter can be defined by a property value
and has a meaningful default.
Signed-off-by: Rob Herring
Signed-off-by: Mark Langsdorf
---
Changes from v3
Changed default value
On 28 December 2011 01:24, Mark Langsdorf wrote:
> + case 0x104:
> + /* aux_ctrl values affect cache_type values */
> + s->aux_ctrl = value;
> + cache_data = (value & (7 << 17)) >> 15;
> + cache_data |= (value & (1 << 16)) >> 16;
> + s->cache_type |= (cache_da
