On Mon, Jul 15, 2019 at 04:22:46PM +0200, Stefan Brankovic wrote:
> Optimize emulation of ten Altivec instructions: lvsl, lvsr, vsl, vsr, vpkpx,
> vgbbd, vclzb, vclzh, vclzw and vclzd.
>
> This series buils up on and complements recent work of Thomas Murta, Mark
> Cave-Ayland and Richard
On Mon, Jul 15, 2019 at 04:22:46PM +0200, Stefan Brankovic wrote:
> Optimize emulation of ten Altivec instructions: lvsl, lvsr, vsl, vsr, vpkpx,
> vgbbd, vclzb, vclzh, vclzw and vclzd.
>
> This series buils up on and complements recent work of Thomas Murta, Mark
> Cave-Ayland and Richard
On Mon, Jul 15, 2019 at 04:22:46PM +0200, Stefan Brankovic wrote:
> Optimize emulation of ten Altivec instructions: lvsl, lvsr, vsl, vsr, vpkpx,
> vgbbd, vclzb, vclzh, vclzw and vclzd.
>
> This series buils up on and complements recent work of Thomas Murta, Mark
> Cave-Ayland and Richard
Optimize emulation of ten Altivec instructions: lvsl, lvsr, vsl, vsr, vpkpx,
vgbbd, vclzb, vclzh, vclzw and vclzd.
This series buils up on and complements recent work of Thomas Murta, Mark
Cave-Ayland and Richard Henderson in the same area. It is based on devising TCG
translation implementation
