Re: [Qemu-devel] [PATCH v5 28/28] fpu/softfloat: Define floatN_silence_nan in terms of parts_silence_nan

2018-05-15 Thread Richard Henderson
On 05/15/2018 08:41 AM, Richard Henderson wrote: > On 05/15/2018 06:45 AM, Alex Bennée wrote: >>> +float64 float64_silence_nan(float64 a, float_status *status) >>> +{ >>> +return float64_pack_raw(parts_silence_nan(float64_unpack_raw(a), >>> status)); >>> +} >>> + >> >> Not that I'm objecting t

Re: [Qemu-devel] [PATCH v5 28/28] fpu/softfloat: Define floatN_silence_nan in terms of parts_silence_nan

2018-05-15 Thread Richard Henderson
On 05/15/2018 06:45 AM, Alex Bennée wrote: >> +float64 float64_silence_nan(float64 a, float_status *status) >> +{ >> +return float64_pack_raw(parts_silence_nan(float64_unpack_raw(a), >> status)); >> +} >> + > > Not that I'm objecting to the rationalisation but did you look at the > code gener

Re: [Qemu-devel] [PATCH v5 28/28] fpu/softfloat: Define floatN_silence_nan in terms of parts_silence_nan

2018-05-15 Thread Alex Bennée
Richard Henderson writes: > Isolate the target-specific choice to 3 functions instead of 6. > > The code in floatx80_default_nan tried to be over-general. There are > only two targets that support this format: x86 and m68k. Thus there > is no point in inventing a mechanism for snan_bit_is_one.

[Qemu-devel] [PATCH v5 28/28] fpu/softfloat: Define floatN_silence_nan in terms of parts_silence_nan

2018-05-14 Thread Richard Henderson
Isolate the target-specific choice to 3 functions instead of 6. The code in floatx80_default_nan tried to be over-general. There are only two targets that support this format: x86 and m68k. Thus there is no point in inventing a mechanism for snan_bit_is_one. Move routines that no longer have if