On Oct 15 12:45, Richard Henderson wrote:
> On 10/10/18 1:37 PM, Aaron Lindsay wrote:
> > +static void cpu_post_save(void *opaque)
> > +{
> > +ARMCPU *cpu = opaque;
> > +pmccntr_sync(&cpu->env);
> > +}
>
> I'm confused about the need for this.
> Can you explain the sequence of events that
On 10/10/18 1:37 PM, Aaron Lindsay wrote:
> +static void cpu_post_save(void *opaque)
> +{
> +ARMCPU *cpu = opaque;
> +pmccntr_sync(&cpu->env);
> +}
I'm confused about the need for this.
Can you explain the sequence of events that requires it?
r~
Because of the PMU's design, many register accesses have side effects
which are inter-related, meaning that the normal method of saving CP
registers can result in inconsistent state. These side-effects are
largely handled in *op_start and *op_finish functions which can be
called globally once befor
