Re: [Qemu-devel] [PATCH v6 5/5] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support

2018-02-07 Thread Alex Bennée
Peter Maydell writes: > On 7 February 2018 at 14:57, Alex Bennée wrote: >> >> Ard Biesheuvel writes: >> >>> Add support for the new ARMv8.2 SHA-3, SM3, SM4 and SHA-512 instructions to >>> AArch64 user mode emulation. >> >> So another problem I've come across is I can't turn this off. I ended u

Re: [Qemu-devel] [PATCH v6 5/5] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support

2018-02-07 Thread Peter Maydell
On 7 February 2018 at 14:57, Alex Bennée wrote: > > Ard Biesheuvel writes: > >> Add support for the new ARMv8.2 SHA-3, SM3, SM4 and SHA-512 instructions to >> AArch64 user mode emulation. > > So another problem I've come across is I can't turn this off. I ended up > doing that in my FP16 series b

Re: [Qemu-devel] [PATCH v6 5/5] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support

2018-02-07 Thread Alex Bennée
Ard Biesheuvel writes: > Add support for the new ARMv8.2 SHA-3, SM3, SM4 and SHA-512 instructions to > AArch64 user mode emulation. So another problem I've come across is I can't turn this off. I ended up doing that in my FP16 series because otherwise existing RISU tests get broken. However hav

Re: [Qemu-devel] [PATCH v6 5/5] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support

2018-02-07 Thread Ard Biesheuvel
On 7 February 2018 at 11:57, Laurent Desnogues wrote: > On Wed, Feb 7, 2018 at 12:53 PM, Ard Biesheuvel > wrote: >> On 7 February 2018 at 11:49, Alex Bennée wrote: >>> >>> Ard Biesheuvel writes: >>> Add support for the new ARMv8.2 SHA-3, SM3, SM4 and SHA-512 instructions to AArch64 us

Re: [Qemu-devel] [PATCH v6 5/5] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support

2018-02-07 Thread Laurent Desnogues
On Wed, Feb 7, 2018 at 12:53 PM, Ard Biesheuvel wrote: > On 7 February 2018 at 11:49, Alex Bennée wrote: >> >> Ard Biesheuvel writes: >> >>> Add support for the new ARMv8.2 SHA-3, SM3, SM4 and SHA-512 instructions to >>> AArch64 user mode emulation. >> >> Are you aware of any processors with ARM

Re: [Qemu-devel] [PATCH v6 5/5] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support

2018-02-07 Thread Ard Biesheuvel
On 7 February 2018 at 11:49, Alex Bennée wrote: > > Ard Biesheuvel writes: > >> Add support for the new ARMv8.2 SHA-3, SM3, SM4 and SHA-512 instructions to >> AArch64 user mode emulation. > > Are you aware of any processors with ARMv8.2 available yet? It might be > nice to have a more recent mode

Re: [Qemu-devel] [PATCH v6 5/5] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support

2018-02-07 Thread Alex Bennée
Ard Biesheuvel writes: > Add support for the new ARMv8.2 SHA-3, SM3, SM4 and SHA-512 instructions to > AArch64 user mode emulation. Are you aware of any processors with ARMv8.2 available yet? It might be nice to have a more recent model for system emulation and the pieces seems to be coming tog

[Qemu-devel] [PATCH v6 5/5] target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support

2018-02-07 Thread Ard Biesheuvel
Add support for the new ARMv8.2 SHA-3, SM3, SM4 and SHA-512 instructions to AArch64 user mode emulation. Signed-off-by: Ard Biesheuvel --- linux-user/elfload.c | 19 +++ target/arm/cpu64.c | 4 2 files changed, 23 insertions(+) diff --git a/linux-user/elfload.c b/linux-u