Signed-off-by: Aaron Lindsay
---
target/arm/cpu.h| 4 ++--
target/arm/helper.c | 12 ++--
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 627e5c1995..50de58e4a2 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -837,8 +8
On Tue, 20 Nov 2018 at 21:26, Aaron Lindsay
wrote:
>
> Signed-off-by: Aaron Lindsay
> ---
> target/arm/cpu.h| 4 ++--
> target/arm/helper.c | 12 ++--
> 2 files changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 627e5c1995..50de58e
On Nov 30 16:10, Peter Maydell wrote:
> On Tue, 20 Nov 2018 at 21:26, Aaron Lindsay
> wrote:
> >
> > Signed-off-by: Aaron Lindsay
> > ---
> > target/arm/cpu.h| 4 ++--
> > target/arm/helper.c | 12 ++--
> > 2 files changed, 12 insertions(+), 4 deletions(-)
> >
> > diff --git a/targe
On Mon, 3 Dec 2018 at 20:45, Aaron Lindsay wrote:
>
> On Nov 30 16:10, Peter Maydell wrote:
> > PMCEID2 and PMCEID3 are only defined from ARMv8.1; before that they
> > are UNDEFINED. So these registers need to be only defined if a
> > suitable feature bit or ID register field check passes.
>
> It
On 12/3/18 4:19 PM, Peter Maydell wrote:
> On Mon, 3 Dec 2018 at 20:45, Aaron Lindsay
> wrote:
>>
>> On Nov 30 16:10, Peter Maydell wrote:
>>> PMCEID2 and PMCEID3 are only defined from ARMv8.1; before that they
>>> are UNDEFINED. So these registers need to be only defined if a
>>> suitable featur
On Dec 03 16:57, Richard Henderson wrote:
> On 12/3/18 4:19 PM, Peter Maydell wrote:
> > On Mon, 3 Dec 2018 at 20:45, Aaron Lindsay
> > wrote:
> >>
> >> On Nov 30 16:10, Peter Maydell wrote:
> >>> PMCEID2 and PMCEID3 are only defined from ARMv8.1; before that they
> >>> are UNDEFINED. So these re
On Wed, 5 Dec 2018 at 13:00, Aaron Lindsay wrote:
>
> On Dec 03 16:57, Richard Henderson wrote:
> > Yes. It would appear that this feature should be controlled by
> > ID_DFR0.PerfMon. So,
> >
> > if (FIELD_EX32(cpu->id_dfr0, ID_DFR0, PERFMON) >= 4)
> >
> > once the appropriate FIELDs are added
