For PMSAv7, the v7A/R Arm ARM defines that setting AP to 0b111
is an UNPREDICTABLE reserved combination. However, for v7M
this value is documented as having the same behaviour as 0b110:
read-only for both privileged and unprivileged. Accept this
value on an M profile core rather than treating it as a guest
error and a no-access page.
Reported-by: Andy Gross <andy.gr...@linaro.org>
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
Message-id: 1512742402-31669-1-git-send-email-peter.mayd...@linaro.org
---
target/arm/helper.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index d1395f9..eb80f79 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9272,6 +9272,13 @@ static bool get_phys_addr_pmsav7(CPUARMState *env,
uint32_t address,
case 6:
*prot |= PAGE_READ | PAGE_EXEC;
break;
+ case 7:
+ /* for v7M, same as 6; for R profile a reserved value */
+ if (arm_feature(env, ARM_FEATURE_M)) {
+ *prot |= PAGE_READ | PAGE_EXEC;
+ break;
+ }
+ /* fall through */
default:
qemu_log_mask(LOG_GUEST_ERROR,
"DRACR[%d]: Bad value for AP bits: 0x%"
@@ -9290,6 +9297,13 @@ static bool get_phys_addr_pmsav7(CPUARMState *env,
uint32_t address,
case 6:
*prot |= PAGE_READ | PAGE_EXEC;
break;
+ case 7:
+ /* for v7M, same as 6; for R profile a reserved value */
+ if (arm_feature(env, ARM_FEATURE_M)) {
+ *prot |= PAGE_READ | PAGE_EXEC;
+ break;
+ }
+ /* fall through */
default:
qemu_log_mask(LOG_GUEST_ERROR,
"DRACR[%d]: Bad value for AP bits: 0x%"
--
2.7.4
