From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
Not all exception types update both FAR and ESR.
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Greg Bellows <greg.bell...@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
Message-id: 1411718914-6608-7-git-send-email-edgar.igles...@gmail.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
---
target-arm/helper-a64.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index 4be0784..c6ef8e9 100644
--- a/target-arm/helper-a64.c
+++ b/target-arm/helper-a64.c
@@ -466,18 +466,17 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
env->exception.syndrome);
}
- env->cp15.esr_el[new_el] = env->exception.syndrome;
- env->cp15.far_el[new_el] = env->exception.vaddress;
-
switch (cs->exception_index) {
case EXCP_PREFETCH_ABORT:
case EXCP_DATA_ABORT:
+ env->cp15.far_el[new_el] = env->exception.vaddress;
qemu_log_mask(CPU_LOG_INT, "...with FAR 0x%" PRIx64 "\n",
env->cp15.far_el[new_el]);
- break;
+ /* fall through */
case EXCP_BKPT:
case EXCP_UDEF:
case EXCP_SWI:
+ env->cp15.esr_el[new_el] = env->exception.syndrome;
break;
case EXCP_IRQ:
addr += 0x80;
--
1.9.1
