On 14 October 2016 at 07:44, Alex Bennée wrote:
>
> Peter Maydell writes:
>
>> In the ARM v6 architecture, 'sub pc, pc, 1' is not an interworking
>> branch, so the computed new value is written to r15 as a normal
>> value. The architecture says that in this case, bits [1:0] of
>> the value writte
Peter Maydell writes:
> In the ARM v6 architecture, 'sub pc, pc, 1' is not an interworking
> branch, so the computed new value is written to r15 as a normal
> value. The architecture says that in this case, bits [1:0] of
> the value written must be ignored if we are in ARM mode (or
> bit [0] ign
In the ARM v6 architecture, 'sub pc, pc, 1' is not an interworking
branch, so the computed new value is written to r15 as a normal
value. The architecture says that in this case, bits [1:0] of
the value written must be ignored if we are in ARM mode (or
bit [0] ignored if in Thumb mode); this is a c
