From: Bin Meng <bmeng...@gmail.com>
At present each hart's hartid in a RISC-V hart array is assigned
the same value of its index in the hart array. But for a system
that has multiple hart arrays, this is not the case any more.
Add a new "hartid-base" property so that hartid number can be
assigned based on the property value.
Signed-off-by: Bin Meng <bmeng...@gmail.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Signed-off-by: Palmer Dabbelt <pal...@sifive.com>
---
hw/riscv/riscv_hart.c | 3 ++-
include/hw/riscv/riscv_hart.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c
index 6620e41cb7..5b98227db6 100644
--- a/hw/riscv/riscv_hart.c
+++ b/hw/riscv/riscv_hart.c
@@ -29,6 +29,7 @@
static Property riscv_harts_props[] = {
DEFINE_PROP_UINT32("num-harts", RISCVHartArrayState, num_harts, 1),
+ DEFINE_PROP_UINT32("hartid-base", RISCVHartArrayState, hartid_base, 0),
DEFINE_PROP_STRING("cpu-type", RISCVHartArrayState, cpu_type),
DEFINE_PROP_END_OF_LIST(),
};
@@ -47,7 +48,7 @@ static void riscv_hart_realize(RISCVHartArrayState *s, int
idx,
object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx],
sizeof(RISCVCPU), cpu_type,
&error_abort, NULL);
- s->harts[idx].env.mhartid = idx;
+ s->harts[idx].env.mhartid = s->hartid_base + idx;
qemu_register_reset(riscv_harts_cpu_reset, &s->harts[idx]);
object_property_set_bool(OBJECT(&s->harts[idx]), true,
"realized", &err);
diff --git a/include/hw/riscv/riscv_hart.h b/include/hw/riscv/riscv_hart.h
index 3b52b50571..c75856fa73 100644
--- a/include/hw/riscv/riscv_hart.h
+++ b/include/hw/riscv/riscv_hart.h
@@ -35,6 +35,7 @@ typedef struct RISCVHartArrayState {
/*< public >*/
uint32_t num_harts;
+ uint32_t hartid_base;
char *cpu_type;
RISCVCPU *harts;
} RISCVHartArrayState;
--
2.21.0
