Mainstone patch against latest cvs. -Armin
Index: qemu_dev/hw/mainstone.c =================================================================== --- qemu_dev.orig/hw/mainstone.c +++ qemu_dev/hw/mainstone.c @@ -87,33 +87,31 @@ static void mainstone_common_init(int ra /* Setup initial (reset) machine state */ cpu->env->regs[15] = PXA2XX_SDRAM_BASE; - /* There are two 32MiB flash devices on the board */ + /* There are two 32MiB flash devices on the board + * switch #7 governs which bank to use + */ index = drive_get_index(IF_PFLASH, 0, 0); if (index == -1) { - fprintf(stderr, "Two flash images must be given with the " + fprintf(stderr, "One flash image must be given with the " "'pflash' parameter\n"); exit(1); } - if (!pflash_cfi01_register(MST_FLASH_0, - mainstone_ram + PXA2XX_INTERNAL_SIZE, - drives_table[index].bdrv, - 256 * 1024, 128, 4, 0, 0, 0, 0)) { - fprintf(stderr, "qemu: Error registering flash memory.\n"); - exit(1); - } - - index = drive_get_index(IF_PFLASH, 0, 1); - if (index == -1) { - fprintf(stderr, "Two flash images must be given with the " - "'pflash' parameter\n"); - exit(1); - } - if (!pflash_cfi01_register(MST_FLASH_1, - mainstone_ram + PXA2XX_INTERNAL_SIZE, - drives_table[index].bdrv, - 256 * 1024, 128, 4, 0, 0, 0, 0)) { - fprintf(stderr, "qemu: Error registering flash memory.\n"); - exit(1); + if(switch_get_value(CFG_SPDT_SWITCH, 7)) { + if (!pflash_cfi01_register(MST_FLASH_0, + mainstone_ram + PXA2XX_INTERNAL_SIZE, + drives_table[index].bdrv, + 256 * 1024, 128, 4, 0, 0, 0, 0)) { + fprintf(stderr, "qemu: Error registering flash memory.\n"); + exit(1); + } + } else { + if (!pflash_cfi01_register(MST_FLASH_1, + mainstone_ram + PXA2XX_INTERNAL_SIZE, + drives_table[index].bdrv, + 256 * 1024, 128, 4, 0, 0, 0, 0)) { + fprintf(stderr, "qemu: Error registering flash memory.\n"); + exit(1); + } } mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0);