Re: [Qemu-devel] [Qemu-ppc] [PATCH 41/77] ppc/pnv: Add LPC controller and hook it up with a UART and RTC

2015-12-03 Thread Benjamin Herrenschmidt
On Thu, 2015-12-03 at 12:45 +1100, David Gibson wrote: > > There are several different cases here and I'm not sure which you're > thinking about. > > 1) Guest has different number of threads-per-core than the host > > This one is just fine - PAPR defines how the guest should get the > number of

Re: [Qemu-devel] [Qemu-ppc] [PATCH 41/77] ppc/pnv: Add LPC controller and hook it up with a UART and RTC

2015-12-03 Thread Benjamin Herrenschmidt
On Thu, 2015-12-03 at 12:04 +1100, Alexey Kardashevskiy wrote: > On 12/02/2015 04:29 PM, Benjamin Herrenschmidt wrote: > > On Wed, 2015-12-02 at 13:24 +1100, Alexey Kardashevskiy wrote: > > > > But on the whole I agree with you, since the LPC is part of the P8 > > > > chip, I think it makes sense t

Re: [Qemu-devel] [Qemu-ppc] [PATCH 41/77] ppc/pnv: Add LPC controller and hook it up with a UART and RTC

2015-12-02 Thread David Gibson
On Thu, Dec 03, 2015 at 12:04:58PM +1100, Alexey Kardashevskiy wrote: > On 12/02/2015 04:29 PM, Benjamin Herrenschmidt wrote: > >On Wed, 2015-12-02 at 13:24 +1100, Alexey Kardashevskiy wrote: > >>>But on the whole I agree with you, since the LPC is part of the P8 > >>>chip, I think it makes sense t

Re: [Qemu-devel] [Qemu-ppc] [PATCH 41/77] ppc/pnv: Add LPC controller and hook it up with a UART and RTC

2015-12-02 Thread Alexey Kardashevskiy
On 12/02/2015 04:29 PM, Benjamin Herrenschmidt wrote: On Wed, 2015-12-02 at 13:24 +1100, Alexey Kardashevskiy wrote: But on the whole I agree with you, since the LPC is part of the P8 chip, I think it makes sense to include it even with -nodefaults. POWER8 chips all have 8 threads per core but

Re: [Qemu-devel] [Qemu-ppc] [PATCH 41/77] ppc/pnv: Add LPC controller and hook it up with a UART and RTC

2015-12-01 Thread Benjamin Herrenschmidt
On Wed, 2015-12-02 at 13:24 +1100, Alexey Kardashevskiy wrote: > > But on the whole I agree with you, since the LPC is part of the P8 > > chip, I think it makes sense to include it even with -nodefaults. > > POWER8 chips all have 8 threads per core but we do not always assume -smtĀ  > ...,threads=8

Re: [Qemu-devel] [Qemu-ppc] [PATCH 41/77] ppc/pnv: Add LPC controller and hook it up with a UART and RTC

2015-12-01 Thread Alexey Kardashevskiy
On 12/01/2015 05:43 PM, David Gibson wrote: On Tue, Nov 17, 2015 at 11:40:04AM +1100, Benjamin Herrenschmidt wrote: On Tue, 2015-11-17 at 11:32 +1100, Alexey Kardashevskiy wrote: On 11/11/2015 11:27 AM, Benjamin Herrenschmidt wrote: This adds a model of the POWER8 LPC controller. It is then us

Re: [Qemu-devel] [Qemu-ppc] [PATCH 41/77] ppc/pnv: Add LPC controller and hook it up with a UART and RTC

2015-11-30 Thread David Gibson
On Tue, Nov 17, 2015 at 11:40:04AM +1100, Benjamin Herrenschmidt wrote: > On Tue, 2015-11-17 at 11:32 +1100, Alexey Kardashevskiy wrote: > > On 11/11/2015 11:27 AM, Benjamin Herrenschmidt wrote: > > > This adds a model of the POWER8 LPC controller. It is then used > > > by the PowerNV code to attac