Re: [Qemu-devel] [Qemu-ppc] [PATCH v2] target-ppc: ppc can be either endian

2014-04-29 Thread Greg Kurz
On Tue, 29 Apr 2014 11:22:38 +0200 Alexander Graf ag...@suse.de wrote: On 29.04.14 11:15, Greg Kurz wrote: POWER7, POWER7+ and POWER8 families use the ILE bit of the LPCR special purpose register to decide the endianness to use when entering interrupt handlers. When running a Linux guest,

Re: [Qemu-devel] [Qemu-ppc] [PATCH v2] target-ppc: ppc can be either endian

2014-04-29 Thread Alexander Graf
On 29.04.14 16:30, Greg Kurz wrote: On Tue, 29 Apr 2014 11:22:38 +0200 Alexander Graf ag...@suse.de wrote: On 29.04.14 11:15, Greg Kurz wrote: POWER7, POWER7+ and POWER8 families use the ILE bit of the LPCR special purpose register to decide the endianness to use when entering interrupt