[ adding xfs and fsdevel ]
On Fri, Apr 21, 2017 at 6:56 AM, Stefan Hajnoczi wrote:
[..]
>> >>> If the vNVDIMM device is based on the regular file, i think
>> >>> fsync is the bottleneck rather than this mmio-virtualization. :(
>> >>>
>> >>
>> >> Yes, fsync() on the regular
On Thu, Apr 20, 2017 at 12:49:21PM -0700, Dan Williams wrote:
> On Tue, Apr 11, 2017 at 7:56 AM, Dan Williams
> wrote:
> > [ adding Christoph ]
> >
> > On Tue, Apr 11, 2017 at 1:41 AM, Haozhong Zhang
> > wrote:
> >> On 04/06/17 20:02 +0800,
On Tue, Apr 11, 2017 at 7:56 AM, Dan Williams wrote:
> [ adding Christoph ]
>
> On Tue, Apr 11, 2017 at 1:41 AM, Haozhong Zhang
> wrote:
>> On 04/06/17 20:02 +0800, Xiao Guangrong wrote:
>>>
>>>
>>> On 04/06/2017 05:43 PM, Stefan Hajnoczi
On Tue, Apr 11, 2017 at 02:34:26PM +0800, Haozhong Zhang wrote:
> On 04/06/17 10:43 +0100, Stefan Hajnoczi wrote:
> > On Fri, Mar 31, 2017 at 04:41:43PM +0800, Haozhong Zhang wrote:
> > > This patch series constructs the flush hint address structures for
> > > nvdimm devices in QEMU.
> > >
> > >
[ adding Christoph ]
On Tue, Apr 11, 2017 at 1:41 AM, Haozhong Zhang
wrote:
> On 04/06/17 20:02 +0800, Xiao Guangrong wrote:
>>
>>
>> On 04/06/2017 05:43 PM, Stefan Hajnoczi wrote:
>> > On Fri, Mar 31, 2017 at 04:41:43PM +0800, Haozhong Zhang wrote:
>> > > This patch
On 04/06/17 20:02 +0800, Xiao Guangrong wrote:
>
>
> On 04/06/2017 05:43 PM, Stefan Hajnoczi wrote:
> > On Fri, Mar 31, 2017 at 04:41:43PM +0800, Haozhong Zhang wrote:
> > > This patch series constructs the flush hint address structures for
> > > nvdimm devices in QEMU.
> > >
> > > It's of
On 04/06/17 10:43 +0100, Stefan Hajnoczi wrote:
> On Fri, Mar 31, 2017 at 04:41:43PM +0800, Haozhong Zhang wrote:
> > This patch series constructs the flush hint address structures for
> > nvdimm devices in QEMU.
> >
> > It's of course not for 2.9. I send it out early in order to get
> > comments
On Thu, Apr 06, 2017 at 06:31:17PM +0800, Haozhong Zhang wrote:
> On 04/06/17 10:43 +0100, Stefan Hajnoczi wrote:
> > On Fri, Mar 31, 2017 at 04:41:43PM +0800, Haozhong Zhang wrote:
> > We should think about the optimal way of implementing Flush Hint
> > Addresses in QEMU. But if there is no
On Thu, Apr 06, 2017 at 07:32:01AM -0700, Dan Williams wrote:
> On Thu, Apr 6, 2017 at 2:43 AM, Stefan Hajnoczi wrote:
> > On Fri, Mar 31, 2017 at 04:41:43PM +0800, Haozhong Zhang wrote:
> * I don't think we can just skip implementing support for this flush.
> Yes it's
On 31/03/2017 4:41 PM, Haozhong Zhang wrote:
This patch series constructs the flush hint address structures for
nvdimm devices in QEMU.
It's of course not for 2.9. I send it out early in order to get
comments on one point I'm uncertain (see the detailed explanation
below). Thanks for any
On 04/06/2017 05:43 PM, Stefan Hajnoczi wrote:
On Fri, Mar 31, 2017 at 04:41:43PM +0800, Haozhong Zhang wrote:
This patch series constructs the flush hint address structures for
nvdimm devices in QEMU.
It's of course not for 2.9. I send it out early in order to get
comments on one point I'm
On 04/06/2017 05:58 PM, Haozhong Zhang wrote:
On 04/06/17 17:39 +0800, Xiao Guangrong wrote:
On 31/03/2017 4:41 PM, Haozhong Zhang wrote:
This patch series constructs the flush hint address structures for
nvdimm devices in QEMU.
It's of course not for 2.9. I send it out early in order to
On Thu, Apr 6, 2017 at 2:43 AM, Stefan Hajnoczi wrote:
> On Fri, Mar 31, 2017 at 04:41:43PM +0800, Haozhong Zhang wrote:
>> This patch series constructs the flush hint address structures for
>> nvdimm devices in QEMU.
>>
>> It's of course not for 2.9. I send it out early in
On 04/06/17 10:43 +0100, Stefan Hajnoczi wrote:
> On Fri, Mar 31, 2017 at 04:41:43PM +0800, Haozhong Zhang wrote:
> > This patch series constructs the flush hint address structures for
> > nvdimm devices in QEMU.
> >
> > It's of course not for 2.9. I send it out early in order to get
> > comments
On 04/06/17 17:39 +0800, Xiao Guangrong wrote:
>
>
> On 31/03/2017 4:41 PM, Haozhong Zhang wrote:
> > This patch series constructs the flush hint address structures for
> > nvdimm devices in QEMU.
> >
> > It's of course not for 2.9. I send it out early in order to get
> > comments on one point
On Fri, Mar 31, 2017 at 04:41:43PM +0800, Haozhong Zhang wrote:
> This patch series constructs the flush hint address structures for
> nvdimm devices in QEMU.
>
> It's of course not for 2.9. I send it out early in order to get
> comments on one point I'm uncertain (see the detailed explanation
>
This patch series constructs the flush hint address structures for
nvdimm devices in QEMU.
It's of course not for 2.9. I send it out early in order to get
comments on one point I'm uncertain (see the detailed explanation
below). Thanks for any comments in advance!
Background
---
17 matches
Mail list logo