On 30/11/2017 04:58, David Gibson wrote:
> On Wed, Nov 29, 2017 at 07:22:19PM +0300, Kurban Mallachiev wrote:
>> The msr invalidation code (commits 993eb and 2360b) inverts all
>> bits except MSR_TGPR and MSR_HVB. On non PowerPC 601 processors
>> this leads to incorrect change of excp_prefix in hre
On Wed, Nov 29, 2017 at 07:22:19PM +0300, Kurban Mallachiev wrote:
> The msr invalidation code (commits 993eb and 2360b) inverts all
> bits except MSR_TGPR and MSR_HVB. On non PowerPC 601 processors
> this leads to incorrect change of excp_prefix in hreg_store_msr()
> function. The problem is that
The msr invalidation code (commits 993eb and 2360b) inverts all
bits except MSR_TGPR and MSR_HVB. On non PowerPC 601 processors
this leads to incorrect change of excp_prefix in hreg_store_msr()
function. The problem is that new msr value get multiplied by msr_mask
and inverted msr does not, thus va
