On Mon, Mar 04, 2013 at 07:01:32PM +1000, Peter Crosthwaite wrote:
> Hi All. The clock controller module in the Zynq platform has the ability to
> halt
> and reset arbitrary devices, including the CPU. We use this feature to
> implement
> SMP Linux - the kernel halts CPU1 then rewrites the vector
Hi
On Mon, Mar 04, 2013 at 10:57:49PM +1000, Peter Crosthwaite wrote:
> Hi Andreas,
>
> On Mon, Mar 4, 2013 at 10:03 PM, Andreas Färber wrote:
> > Hi Peter,
> >
> > Am 04.03.2013 10:01, schrieb Peter Crosthwaite:
> >> Hi All. The clock controller module in the Zynq platform has the ability
> >>
Hi Andreas,
On Mon, Mar 4, 2013 at 10:03 PM, Andreas Färber wrote:
> Hi Peter,
>
> Am 04.03.2013 10:01, schrieb Peter Crosthwaite:
>> Hi All. The clock controller module in the Zynq platform has the ability to
>> halt
>> and reset arbitrary devices, including the CPU. We use this feature to
>>
Hi Peter,
Am 04.03.2013 10:01, schrieb Peter Crosthwaite:
> Hi All. The clock controller module in the Zynq platform has the ability to
> halt
> and reset arbitrary devices, including the CPU. We use this feature to
> implement
> SMP Linux - the kernel halts CPU1 then rewrites the vector table t
Hi All. The clock controller module in the Zynq platform has the ability to halt
and reset arbitrary devices, including the CPU. We use this feature to implement
SMP Linux - the kernel halts CPU1 then rewrites the vector table to the
secondary entry point and unhalts.
The clock controller however
