From: Peter A. G. Crosthwaite <peter.crosthwa...@petalogix.com> The SLCR needs to be able to reset the CPUs, so link the CPUs to the slcr.
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwa...@petalogix.com> --- Changed from v2: Soften type of CPU to Device Looped link creator hw/xilinx_zynq.c | 7 +++++++ hw/zynq_slcr.c | 11 +++++++++++ 2 files changed, 18 insertions(+), 0 deletions(-) diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c index 80a2777..9be2b3b 100644 --- a/hw/xilinx_zynq.c +++ b/hw/xilinx_zynq.c @@ -179,6 +179,13 @@ static void zynq_init(QEMUMachineInitArgs *args) dev = qdev_create(NULL, "xilinx,zynq_slcr"); qdev_init_nofail(dev); + Error *errp = NULL; + object_property_set_link(OBJECT(dev), OBJECT(cpus[0]), "cpu0", &errp); + assert_no_error(errp); + if (smp_cpus > 1) { + object_property_set_link(OBJECT(dev), OBJECT(cpus[1]), "cpu1", NULL); + assert_no_error(errp); + } sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8000000); dev = qdev_create(NULL, "a9mpcore_priv"); diff --git a/hw/zynq_slcr.c b/hw/zynq_slcr.c index 27b00f0..4925358 100644 --- a/hw/zynq_slcr.c +++ b/hw/zynq_slcr.c @@ -19,6 +19,8 @@ #include "sysbus.h" #include "sysemu/sysemu.h" +#define NUM_CPUS 2 + #ifdef ZYNQ_ARM_SLCR_ERR_DEBUG #define DB_PRINT(...) do { \ fprintf(stderr, ": %s: ", __func__); \ @@ -118,6 +120,8 @@ typedef struct { SysBusDevice busdev; MemoryRegion iomem; + DeviceState *cpus[NUM_CPUS]; + union { struct { uint16_t scl; @@ -492,11 +496,18 @@ static const MemoryRegionOps slcr_ops = { static int zynq_slcr_init(SysBusDevice *dev) { + int i; ZynqSLCRState *s = FROM_SYSBUS(ZynqSLCRState, dev); memory_region_init_io(&s->iomem, &slcr_ops, s, "slcr", 0x1000); sysbus_init_mmio(dev, &s->iomem); + for (i = 0; i < NUM_CPUS; ++i) { + gchar *name = g_strdup_printf("cpu%d", i); + object_property_add_link(OBJECT(dev), name, TYPE_DEVICE, + (Object **) &s->cpus[i], NULL); + g_free(name); + } return 0; } -- 1.7.0.4