On Mon, Oct 14, 2013 at 04:36:24PM +0100, Peter Maydell wrote:
> On 26 September 2013 22:03, Christoffer Dall
> wrote:
> > Right now the arm gic emulation doesn't keep track of the source of an
> > SGI (which apparently Linux guests don't use, or they're fine with
> > assuming CPU 0 always).
> >
>
On Mon, Oct 14, 2013 at 05:33:38PM +0100, Peter Maydell wrote:
> On 14 October 2013 16:36, Peter Maydell wrote:
[...]
>
> Tangentially, I notice that we don't correctly handle
> the PENDING bit for level triggered interrupts, since
> we do:
>
> /* Clear pending flags for both level and edg
On 14 October 2013 16:36, Peter Maydell wrote:
> Are you sure the logic in this function is right? (ie that we
> should only clear the sgi_source[][] bit for this source, and
> not completely? If nothing else, I think the interrupt should
> stay pending if some other source cpu still wants it to b
On 26 September 2013 22:03, Christoffer Dall
wrote:
> Right now the arm gic emulation doesn't keep track of the source of an
> SGI (which apparently Linux guests don't use, or they're fine with
> assuming CPU 0 always).
>
> Add the necessary matrix on the GICState structure and maintain the data
>
Right now the arm gic emulation doesn't keep track of the source of an
SGI (which apparently Linux guests don't use, or they're fine with
assuming CPU 0 always).
Add the necessary matrix on the GICState structure and maintain the data
when setting and clearing the pending state of an IRQ.
Note th
