On 11/21/18 4:53 PM, Palmer Dabbelt wrote:
>
> Per the memory model chapter (which is being ratified now), FSD is not atomic
> on rv32i:
>
> An FLD or FSD instruction for which XLEN<64 may also be decomposed into a
>
> set of component memory operations of any granularity.
Ah, thanks. I
On Tue, 20 Nov 2018 17:15:11 PST (-0800), alistai...@gmail.com wrote:
On Fri, Nov 16, 2018 at 12:33 AM Richard Henderson
wrote:
On 11/15/18 11:35 PM, Alistair Francis wrote:
> +static void reloc_sbimm12(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
> +{
> +intptr_t offset =
On 11/21/18 2:15 AM, Alistair Francis wrote:
>> Will the riscv-32 compiler use a FSTD insn to implement atomic_set for
>> 64-bit?
>> If not, you may be just better off using the indirect method.
>
> I'm not sure. Is the indirect method just using atomic set, because
> that is what I have now?
On Fri, Nov 16, 2018 at 12:33 AM Richard Henderson
wrote:
>
> On 11/15/18 11:35 PM, Alistair Francis wrote:
> > +static void reloc_sbimm12(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
> > +{
> > +intptr_t offset = (intptr_t)target - (intptr_t)code_ptr;
> > +tcg_debug_assert(offset ==
On 11/15/18 11:35 PM, Alistair Francis wrote:
> +static void reloc_sbimm12(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
> +{
> +intptr_t offset = (intptr_t)target - (intptr_t)code_ptr;
> +tcg_debug_assert(offset == sextract32(offset, 1, 12) << 1);
> +
> +code_ptr[0] |=
Signed-off-by: Alistair Francis
Signed-off-by: Michael Clark
---
tcg/riscv/tcg-target.inc.c | 51 ++
1 file changed, 51 insertions(+)
diff --git a/tcg/riscv/tcg-target.inc.c b/tcg/riscv/tcg-target.inc.c
index d402e48cbf..475feca906 100644
---
