Re: [Qemu-devel] [RFC v2] target-arm: provide skeleton for a64 insn decoding

2013-11-13 Thread Laurent Desnogues
On Tue, Nov 12, 2013 at 2:29 PM, Claudio Fontana wrote: > provide a skeleton for a64 instruction decoding in translate-a64.c, > by dividing instructions into the classes defined by the > ARM Architecture Reference Manual(DDI0487A_a) C3 > > Signed-off-by: Claudio Fontana > Signed-off-by: Alex Benn

Re: [Qemu-devel] [RFC v2] target-arm: provide skeleton for a64 insn decoding

2013-11-12 Thread Richard Henderson
On 11/12/2013 11:29 PM, Claudio Fontana wrote: > provide a skeleton for a64 instruction decoding in translate-a64.c, > by dividing instructions into the classes defined by the > ARM Architecture Reference Manual(DDI0487A_a) C3 > > Signed-off-by: Claudio Fontana > Signed-off-by: Alex Bennée > Rev

[Qemu-devel] [RFC v2] target-arm: provide skeleton for a64 insn decoding

2013-11-12 Thread Claudio Fontana
provide a skeleton for a64 instruction decoding in translate-a64.c, by dividing instructions into the classes defined by the ARM Architecture Reference Manual(DDI0487A_a) C3 Signed-off-by: Claudio Fontana Signed-off-by: Alex Bennée Reviewed-by: Alex Bennée --- target-arm/translate-a64.c | 368