Re: [Qemu-devel] [RFC v2 PATCH] tcg/softmmu: Increase size of TLB caches

On 08/24/2017 08:58 AM, Pranith Kumar wrote: > +#define CPU_TLB_BITS_MAX 12 Following up on our IRC conversation, host maximums are: aarch64:unlimited (32) arm:8 (patch exists to increase to 32 for armv7) i386: 32 - CPU_TLB_ENTRY_BITS ia64: unlimited (32)

Re: [Qemu-devel] [RFC v2 PATCH] tcg/softmmu: Increase size of TLB caches

On 08/24/2017 08:58 AM, Pranith Kumar wrote: > | TLB bits\vTLB entires | 8 |16 |32 | > | 8 | 952.94(+0.0%) | 929.99(+2.4%) | 919.02(+3.6%) | > |10 | 898.92(+5.6%) | 886.13(+7.0%) | 887.03(+6.9%) | > |

Re: [Qemu-devel] [RFC v2 PATCH] tcg/softmmu: Increase size of TLB caches

On Thu, Aug 24, 2017 at 11:58 AM, Pranith Kumar wrote: > This patch increases the number of entries cached in the TLB. I went > over a few architectures to see if increasing it is problematic. Only > armv6 seems to have a limitation that only 8 bits can be used for >

[Qemu-devel] [RFC v2 PATCH] tcg/softmmu: Increase size of TLB caches

This patch increases the number of entries cached in the TLB. I went over a few architectures to see if increasing it is problematic. Only armv6 seems to have a limitation that only 8 bits can be used for indexing these entries. For other architectures, the number of TLB entries is increased to a