On 21/06/16 21:03, Pranith Kumar wrote:
> On Tue, Jun 21, 2016 at 1:54 PM, Peter Maydell
> wrote:
>> On 21 June 2016 at 18:28, Pranith Kumar wrote:
>>> Reg. the second point, I did consider this situation of running x86 on
>>> ARM where such barriers are necessary for correctness. But, I am
>>>
Pranith Kumar writes:
> On Tue, Jun 21, 2016 at 1:54 PM, Peter Maydell
> wrote:
>> On 21 June 2016 at 18:28, Pranith Kumar wrote:
>>> Reg. the second point, I did consider this situation of running x86 on
>>> ARM where such barriers are necessary for correctness. But, I am
>>> really apprehen
On Tue, Jun 21, 2016 at 1:54 PM, Peter Maydell wrote:
> On 21 June 2016 at 18:28, Pranith Kumar wrote:
>> Reg. the second point, I did consider this situation of running x86 on
>> ARM where such barriers are necessary for correctness. But, I am
>> really apprehensive of the cost it will impose. I
On 21 June 2016 at 18:28, Pranith Kumar wrote:
> Reg. the second point, I did consider this situation of running x86 on
> ARM where such barriers are necessary for correctness. But, I am
> really apprehensive of the cost it will impose. I am not sure if there
> are any alternative solutions to avo
On Tue, Jun 21, 2016 at 3:28 AM, Paolo Bonzini wrote:
>
>
> On 18/06/2016 06:03, Pranith Kumar wrote:
>> Signed-off-by: Pranith Kumar
>> ---
>> target-i386/translate.c | 4
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/target-i386/translate.c b/target-i386/translate.c
>> index bf33e
On 21/06/2016 18:23, Richard Henderson wrote:
> On 06/21/2016 09:12 AM, Paolo Bonzini wrote:
>>
>>
>> On 21/06/2016 17:57, Richard Henderson wrote:
>
> || (prefixes & PREFIX_LOCK)) {
> goto illegal_op;
> }
> +tcg_gen_m
On 06/21/2016 09:12 AM, Paolo Bonzini wrote:
On 21/06/2016 17:57, Richard Henderson wrote:
|| (prefixes & PREFIX_LOCK)) {
goto illegal_op;
}
+tcg_gen_mb(TCG_MO_ST_ST | TCG_BAR_SC);
break;
case 0xe8 ... 0xef: /* l
On 21/06/2016 17:57, Richard Henderson wrote:
>>>
>>> || (prefixes & PREFIX_LOCK)) {
>>> goto illegal_op;
>>> }
>>> +tcg_gen_mb(TCG_MO_ST_ST | TCG_BAR_SC);
>>> break;
>>> case 0xe8 ... 0xef: /* lfence */
>>> +
On 06/21/2016 12:28 AM, Paolo Bonzini wrote:
On 18/06/2016 06:03, Pranith Kumar wrote:
Signed-off-by: Pranith Kumar
---
target-i386/translate.c | 4
1 file changed, 4 insertions(+)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index bf33e6b..32b0f5c 100644
--- a/target
On 18/06/2016 06:03, Pranith Kumar wrote:
> Signed-off-by: Pranith Kumar
> ---
> target-i386/translate.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/target-i386/translate.c b/target-i386/translate.c
> index bf33e6b..32b0f5c 100644
> --- a/target-i386/translate.c
> +++ b/target
On Sat, Jun 18, 2016 at 1:48 AM, Richard Henderson wrote:
> On 06/17/2016 09:03 PM, Pranith Kumar wrote:
>>
>> case 0xe8 ... 0xef: /* lfence */
>> +tcg_gen_mb(TCG_MO_LD_LD | TCG_BAR_SC);
>> +break;
>> case 0xf0 ... 0xf7: /* mfence */
>> if (!(
On 06/17/2016 09:03 PM, Pranith Kumar wrote:
case 0xe8 ... 0xef: /* lfence */
+tcg_gen_mb(TCG_MO_LD_LD | TCG_BAR_SC);
+break;
case 0xf0 ... 0xf7: /* mfence */
if (!(s->cpuid_features & CPUID_SSE2)
|| (prefixes & PREFIX_LOCK))
Signed-off-by: Pranith Kumar
---
target-i386/translate.c | 4
1 file changed, 4 insertions(+)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index bf33e6b..32b0f5c 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -8012,13 +8012,17 @@ static target_ulong
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