On 07/26/2011 12:34 AM, Eric Northup wrote:
On Wed, Jul 20, 2011 at 9:50 AM, Avi Kivitya...@redhat.com wrote:
[...]
@@ -130,7 +137,13 @@ static void pc_init1(MemoryRegion *system_memory,
if (pci_enabled) {
pci_bus = i440fx_init(i440fx_state,piix3_devfn, isa_irq,
-
On 07/20/2011 11:50 AM, Avi Kivity wrote:
The current implementation of PAM and the PCI holes is broken in several
ways:
- PCI BARs are not restricted to the PCI hole (a BAR may hide memory)
Technically, a BAR can be mapped to any non-RAM memory location.
- PCI devices do not respect
On 07/25/2011 04:07 PM, Anthony Liguori wrote:
On 07/20/2011 11:50 AM, Avi Kivity wrote:
The current implementation of PAM and the PCI holes is broken in several
ways:
- PCI BARs are not restricted to the PCI hole (a BAR may hide memory)
Technically, a BAR can be mapped to any non-RAM
On Mon, Jul 25, 2011 at 04:14:45PM +0300, Avi Kivity wrote:
On 07/25/2011 04:07 PM, Anthony Liguori wrote:
On 07/20/2011 11:50 AM, Avi Kivity wrote:
The current implementation of PAM and the PCI holes is broken in several
ways:
- PCI BARs are not restricted to the PCI hole (a BAR may
On 07/25/2011 04:17 PM, Gleb Natapov wrote:
On Mon, Jul 25, 2011 at 04:14:45PM +0300, Avi Kivity wrote:
On 07/25/2011 04:07 PM, Anthony Liguori wrote:
On 07/20/2011 11:50 AM, Avi Kivity wrote:
The current implementation of PAM and the PCI holes is broken in several
ways:
- PCI
On Mon, Jul 25, 2011 at 04:28:12PM +0300, Avi Kivity wrote:
On 07/25/2011 04:17 PM, Gleb Natapov wrote:
On Mon, Jul 25, 2011 at 04:14:45PM +0300, Avi Kivity wrote:
On 07/25/2011 04:07 PM, Anthony Liguori wrote:
On 07/20/2011 11:50 AM, Avi Kivity wrote:
The current implementation of PAM
On 07/25/2011 04:28 PM, Avi Kivity wrote:
On 07/25/2011 04:17 PM, Gleb Natapov wrote:
On Mon, Jul 25, 2011 at 04:14:45PM +0300, Avi Kivity wrote:
On 07/25/2011 04:07 PM, Anthony Liguori wrote:
On 07/20/2011 11:50 AM, Avi Kivity wrote:
The current implementation of PAM and the PCI holes is
On 07/25/2011 08:28 AM, Avi Kivity wrote:
On 07/25/2011 04:17 PM, Gleb Natapov wrote:
On Mon, Jul 25, 2011 at 04:14:45PM +0300, Avi Kivity wrote:
On 07/25/2011 04:07 PM, Anthony Liguori wrote:
On 07/20/2011 11:50 AM, Avi Kivity wrote:
The current implementation of PAM and the PCI holes is
On Mon, Jul 25, 2011 at 04:31:27PM +0300, Avi Kivity wrote:
On 07/25/2011 04:28 PM, Avi Kivity wrote:
On 07/25/2011 04:17 PM, Gleb Natapov wrote:
On Mon, Jul 25, 2011 at 04:14:45PM +0300, Avi Kivity wrote:
On 07/25/2011 04:07 PM, Anthony Liguori wrote:
On 07/20/2011 11:50 AM, Avi Kivity
On 07/25/2011 04:35 PM, Gleb Natapov wrote:
That's the ISA TOM (15MB hole and friends).
Correct. What about:
3.2.19.DRB[0:7] DRAM ROW BOUNDARY REGISTERS
from 440fx spec?
Maybe. But we can't use that, since it ignores address line 31.
(440fx supports only 1GB RAM, and we're
On 07/25/2011 08:38 AM, Avi Kivity wrote:
On 07/25/2011 04:35 PM, Gleb Natapov wrote:
That's the ISA TOM (15MB hole and friends).
Correct. What about:
3.2.19. DRB[0:7] DRAM ROW BOUNDARY REGISTERS
from 440fx spec?
Maybe. But we can't use that, since it ignores address line 31.
(440fx
On Mon, Jul 25, 2011 at 08:47:31AM -0500, Anthony Liguori wrote:
On 07/25/2011 08:38 AM, Avi Kivity wrote:
On 07/25/2011 04:35 PM, Gleb Natapov wrote:
That's the ISA TOM (15MB hole and friends).
Correct. What about:
3.2.19. DRB[0:7] DRAM ROW BOUNDARY REGISTERS
from 440fx spec?
On 07/25/2011 04:47 PM, Anthony Liguori wrote:
On 07/25/2011 08:38 AM, Avi Kivity wrote:
On 07/25/2011 04:35 PM, Gleb Natapov wrote:
That's the ISA TOM (15MB hole and friends).
Correct. What about:
3.2.19. DRB[0:7] DRAM ROW BOUNDARY REGISTERS
from 440fx spec?
Maybe. But we can't use
On 07/25/2011 09:05 AM, Avi Kivity wrote:
On 07/25/2011 04:47 PM, Anthony Liguori wrote:
On 07/25/2011 08:38 AM, Avi Kivity wrote:
On 07/25/2011 04:35 PM, Gleb Natapov wrote:
That's the ISA TOM (15MB hole and friends).
Correct. What about:
3.2.19. DRB[0:7] DRAM ROW BOUNDARY REGISTERS
from
On 07/25/2011 05:08 PM, Anthony Liguori wrote:
Why not use 3.5GB and call it a day? It's safer for memory hotplug, if
we ever get it.
The guest will never put a PCI BAR below that anyway.
My entire concern is that they will.
We're not just talking about Windows or Linux here, but any odd
On Wed, Jul 20, 2011 at 9:50 AM, Avi Kivity a...@redhat.com wrote:
[...]
@@ -130,7 +137,13 @@ static void pc_init1(MemoryRegion *system_memory,
if (pci_enabled) {
pci_bus = i440fx_init(i440fx_state, piix3_devfn, isa_irq,
- system_memory, system_io,
The current implementation of PAM and the PCI holes is broken in several
ways:
- PCI BARs are not restricted to the PCI hole (a BAR may hide memory)
- PCI devices do not respect PAM (if a PCI device maps a region while
PAM maps the region to RAM, the request will be honored)
This patch
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