Re: [Qemu-devel] [V2 PATCH 7/8] target-ppc: Bug Fix: srawi

2014-08-15 Thread Richard Henderson
On 08/12/2014 03:45 AM, Tom Musta wrote: > For 64 bit implementations, the special case of a shift by zero > should result in the sign extension of the least significant 32 bits > of the source GPR (not a direct copy of the 64 bit source GPR). > > Example: > > R3 A6212433228F41DC > srawi 3,3,0 >

[Qemu-devel] [V2 PATCH 7/8] target-ppc: Bug Fix: srawi

2014-08-12 Thread Tom Musta
For 64 bit implementations, the special case of a shift by zero should result in the sign extension of the least significant 32 bits of the source GPR (not a direct copy of the 64 bit source GPR). Example: R3 A6212433228F41DC srawi 3,3,0 R3 expected : 228F41DC R3 actual : A6212433228F41