On Tue, Sep 13, 2016 at 10:38 AM, Peter Xu wrote:
> On Mon, Sep 12, 2016 at 03:45:48PM +0300, David Kiarie wrote:
> > > When we say cache here, we are mostly talking about GSI routes in
> > > kernel, right? Since we still don't have other kind of interrupt
> > > caches AFAIK.
On Tue, Sep 13, 2016 at 05:11:00PM +0300, Michael S. Tsirkin wrote:
> On Tue, Sep 13, 2016 at 03:38:38PM +0800, Peter Xu wrote:
> > On Mon, Sep 12, 2016 at 03:45:48PM +0300, David Kiarie wrote:
> > > > When we say cache here, we are mostly talking about GSI routes in
> > > > kernel, right? Since
On Tue, Sep 13, 2016 at 03:38:38PM +0800, Peter Xu wrote:
> On Mon, Sep 12, 2016 at 03:45:48PM +0300, David Kiarie wrote:
> > > When we say cache here, we are mostly talking about GSI routes in
> > > kernel, right? Since we still don't have other kind of interrupt
> > > caches AFAIK. If so, GSI
On Mon, Sep 12, 2016 at 03:45:48PM +0300, David Kiarie wrote:
> > When we say cache here, we are mostly talking about GSI routes in
> > kernel, right? Since we still don't have other kind of interrupt
> > caches AFAIK. If so, GSI routes should already been setup even if the
> > interrupts are not
On Mon, Sep 12, 2016 at 3:11 PM, Peter Xu wrote:
> On Mon, Sep 12, 2016 at 02:51:27PM +0300, David Kiarie wrote:
> > On Mon, Sep 12, 2016 at 2:34 PM, Peter Xu wrote:
> >
> > > On Mon, Sep 12, 2016 at 01:08:07PM +0300, David Kiarie wrote:
> > >
> > > [...]
>
On Mon, Sep 12, 2016 at 02:51:27PM +0300, David Kiarie wrote:
> On Mon, Sep 12, 2016 at 2:34 PM, Peter Xu wrote:
>
> > On Mon, Sep 12, 2016 at 01:08:07PM +0300, David Kiarie wrote:
> >
> > [...]
> >
> > > /* configure MMIO registers at startup/reset */
> > > static void
On Mon, Sep 12, 2016 at 2:34 PM, Peter Xu wrote:
> On Mon, Sep 12, 2016 at 01:08:07PM +0300, David Kiarie wrote:
>
> [...]
>
> > /* configure MMIO registers at startup/reset */
> > static void amdvi_set_quad(AMDVIState *s, hwaddr addr, uint64_t val,
> >
On Mon, Sep 12, 2016 at 01:08:07PM +0300, David Kiarie wrote:
[...]
> /* configure MMIO registers at startup/reset */
> static void amdvi_set_quad(AMDVIState *s, hwaddr addr, uint64_t val,
> uint64_t romask, uint64_t w1cmask)
> @@ -641,6 +667,11 @@ static void
Introduce AMD IOMMU interrupt remapping and hook it onto
the existing interrupt remapping infrastructure
Signed-off-by: David Kiarie
---
hw/i386/amd_iommu.c | 240 +++-
hw/i386/amd_iommu.h | 4 +-
hw/intc/ioapic.c|