Hello, here are some missed undefined instructions I skipped over last time (I had forgotten to enable FP16 support in QEMU):
- disas_simd_across_lanes: for FP16 FMAX/FMINV/FMAXNMV/FMINNMV it should be checked that bit 0 of the size field is 0 - disas_simd_mod_imm: FP16 FMOV imm must have bit 29 = 0 - disas_simd_scalar_pairwise: FP16 FMAXP/FADPP/... must have bit 0 of the size field = 0 - disas_simd_three_reg_same_fp16: opcodes 5, b, c, d, 11, 19, 1b, 1f are unallocated - disas_simd_two_reg_misc_fp16: FRECPX is a scalar only instruction - disas_simd_two_reg_misc_fp16: FABS/FNEG/FSQRT are vector only instructions - disas_simd_two_reg_misc_fp16: the default clause should undef in the first switch statement - disas_simd_two_reg_misc_fp16: FNEG should be removed from the scalar part. Hopefully that's all that was left... Thanks, Laurent
