Hi,
Added enabling VFP co-processor in the bootrom emulation code. Works like a
charm.
Many thanks.
Best regards,
Karthik
On Tue, May 24, 2016 at 7:52 PM, Karthik wrote:
> Yeah, the micro had a secure boot ROM which we don't have access to.
> Probably it is enabled there. I'll check in the t
Yeah, the micro had a secure boot ROM which we don't have access to.
Probably it is enabled there. I'll check in the target hardware.
The code generated by the compiler doesn't specifically check for
non-existent registers, so we should be good using VFP3 in place for
VFP3-D16.
Best regards,
Kart
On 24 May 2016 at 14:49, Karthik wrote:
> ahh okay. The code I don't think writes to CPACR_EL1 register, but it runs
> on the hardware anywary.
If it does then there's probably some firmware somewhere
which is doing the setup for you somehow.
As you can see in the Cortex-R5 technical reference m
ahh okay. The code I don't think writes to CPACR_EL1 register, but it runs
on the hardware anywary.
I`ll double check.
Thanks for the tip.
Best regards,
Karthik
On Tue, May 24, 2016 at 7:07 PM, Peter Maydell
wrote:
> On 24 May 2016 at 14:07, Karthik wrote:
> > I am working on adding support
On 24 May 2016 at 14:07, Karthik wrote:
> I am working on adding support for a Spansion microcontroller which has an
> Cortex R5 core + VFP3 co processor.
>
> I have added the below line
> set_feature(&cpu->env, ARM_FEATURE_VFP3)
> to cortex_r5_initfn at /target-arm/cpu.c
>
> But, still I got unde
Hi,
I am working on adding support for a Spansion microcontroller which has an
Cortex R5 core + VFP3 co processor.
I have added the below line
set_feature(&cpu->env, ARM_FEATURE_VFP3)
to cortex_r5_initfn at /target-arm/cpu.c
But, still I got undefined exception when the processor encountered any
