2014-06-27 17:55 GMT+08:00 Jan Kiszka :
> On 2014-06-27 07:46, Le Tan wrote:
>> 2014-06-27 12:55 GMT+08:00 Paolo Bonzini :
>>> Il 27/06/2014 04:08, Le Tan ha scritto:
>>>
1. In struct IOMMUTLBEntry, I think the addr_mask field should be the
mask of the page offset, right? But I see differ
On 2014-06-27 07:46, Le Tan wrote:
> 2014-06-27 12:55 GMT+08:00 Paolo Bonzini :
>> Il 27/06/2014 04:08, Le Tan ha scritto:
>>
>>> 1. In struct IOMMUTLBEntry, I think the addr_mask field should be the
>>> mask of the page offset, right? But I see different usages of this
>>> field. In spapr_tce_tran
2014-06-27 12:55 GMT+08:00 Paolo Bonzini :
> Il 27/06/2014 04:08, Le Tan ha scritto:
>
>> 1. In struct IOMMUTLBEntry, I think the addr_mask field should be the
>> mask of the page offset, right? But I see different usages of this
>> field. In spapr_tce_translate_iommu(), the addr_mask field is assi
Il 27/06/2014 04:08, Le Tan ha scritto:
1. In struct IOMMUTLBEntry, I think the addr_mask field should be the
mask of the page offset, right? But I see different usages of this
field. In spapr_tce_translate_iommu(), the addr_mask field is assigned
with the mask of the page offset. However, in pbm
2014-06-26 22:05 GMT+08:00 Paolo Bonzini :
> Il 26/06/2014 16:01, Le Tan ha scritto:
>
>> Hi Paolo,
>> I am adding intel-iommu emulation to q35 for the GSoC project. I am
>> confused about AddressSpace and I believe that you can help me. :)
>> 1. For intel-iommu emulation, I have to read the transl
2014-06-26 22:05 GMT+08:00 Paolo Bonzini :
> Il 26/06/2014 16:01, Le Tan ha scritto:
>
>> Hi Paolo,
>> I am adding intel-iommu emulation to q35 for the GSoC project. I am
>> confused about AddressSpace and I believe that you can help me. :)
>> 1. For intel-iommu emulation, I have to read the transl
Il 26/06/2014 16:01, Le Tan ha scritto:
Hi Paolo,
I am adding intel-iommu emulation to q35 for the GSoC project. I am
confused about AddressSpace and I believe that you can help me. :)
1. For intel-iommu emulation, I have to read the translation
structures from guest memory, that is, the guest wi
Hi Paolo,
I am adding intel-iommu emulation to q35 for the GSoC project. I am
confused about AddressSpace and I believe that you can help me. :)
1. For intel-iommu emulation, I have to read the translation
structures from guest memory, that is, the guest will prepare some
tables in memory and write
