> > It's a bug in the qemu FIQ bank switching code. Fixed now.
>
> Oh, great!
>
> How do I get the patch?
http://cvs.savannah.nongnu.org/viewcvs/qemu/target-arm/helper.c?root=qemu&r1=1.4&r2=1.5
Paul
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> -Original Message-
> From: Paul Brook [mailto:[EMAIL PROTECTED]
> Sent: Tuesday, March 14, 2006 3:21 PM
> To: qemu-devel@nongnu.org
> Cc: Schwarz, Konrad
> Subject: Re: [Qemu-devel] Questions on ARM port
>
> > Basically, r3 is initialized by (to 0x8, in
> Basically, r3 is initialized by (to 0x8, in my case). The
> next instruction (at ) switches the mode to FIQ. After single
> steping over this in QEMU (via GDB si), r3 no longer contains what it
> had before (0x8), instead, it is set to 0. If I manually fix this
> (via set $r3=0x8)
Hello,
the Newlib crt0.S
file for ARM starts off by initializing the stack pointers for the different ARM
modes (FIQ, IRQ, supervisor, etc.) with the help of r3.
e.g., this is the
disassembly as produced by GDB:
Dump of assembler code for function
start:0x8224 : ldr
r3, [pc,
