On Tue, Sep 28, 2010 at 11:27:03AM +0200, Michael S. Tsirkin wrote:
> On Tue, Sep 28, 2010 at 08:01:15AM +0900, Isaku Yamahata wrote:
> > On Mon, Sep 27, 2010 at 12:40:12PM +0200, Michael S. Tsirkin wrote:
> > > On Mon, Sep 27, 2010 at 03:22:43PM +0900, Isaku Yamahata wrote:
> > > > On Sun, Sep 26,
On Tue, Sep 28, 2010 at 08:01:15AM +0900, Isaku Yamahata wrote:
> On Mon, Sep 27, 2010 at 12:40:12PM +0200, Michael S. Tsirkin wrote:
> > On Mon, Sep 27, 2010 at 03:22:43PM +0900, Isaku Yamahata wrote:
> > > On Sun, Sep 26, 2010 at 02:50:42PM +0200, Michael S. Tsirkin wrote:
> > > > On Fri, Sep 24,
On Mon, Sep 27, 2010 at 12:40:12PM +0200, Michael S. Tsirkin wrote:
> On Mon, Sep 27, 2010 at 03:22:43PM +0900, Isaku Yamahata wrote:
> > On Sun, Sep 26, 2010 at 02:50:42PM +0200, Michael S. Tsirkin wrote:
> > > On Fri, Sep 24, 2010 at 02:38:09PM +0900, Isaku Yamahata wrote:
> > > > On Wed, Sep 22,
On Mon, Sep 27, 2010 at 03:22:43PM +0900, Isaku Yamahata wrote:
> On Sun, Sep 26, 2010 at 02:50:42PM +0200, Michael S. Tsirkin wrote:
> > On Fri, Sep 24, 2010 at 02:38:09PM +0900, Isaku Yamahata wrote:
> > > On Wed, Sep 22, 2010 at 01:25:59PM +0200, Michael S. Tsirkin wrote:
> > >
> > > > > +PCIES
On Sun, Sep 26, 2010 at 02:49:40PM +0200, Michael S. Tsirkin wrote:
> On Fri, Sep 24, 2010 at 02:38:09PM +0900, Isaku Yamahata wrote:
> > On Wed, Sep 22, 2010 at 01:25:59PM +0200, Michael S. Tsirkin wrote:
> >
> > > > +PCIESlot *pcie_root_init(PCIBus *bus, int devfn, bool multifunction,
> > > > +
On Sun, Sep 26, 2010 at 02:50:42PM +0200, Michael S. Tsirkin wrote:
> On Fri, Sep 24, 2010 at 02:38:09PM +0900, Isaku Yamahata wrote:
> > On Wed, Sep 22, 2010 at 01:25:59PM +0200, Michael S. Tsirkin wrote:
> >
> > > > +PCIESlot *pcie_root_init(PCIBus *bus, int devfn, bool multifunction,
> > > > +
On Fri, Sep 24, 2010 at 02:38:09PM +0900, Isaku Yamahata wrote:
> On Wed, Sep 22, 2010 at 01:25:59PM +0200, Michael S. Tsirkin wrote:
>
> > > +PCIESlot *pcie_root_init(PCIBus *bus, int devfn, bool multifunction,
> > > + const char *bus_name, pci_map_irq_fn map_irq,
> > > +
On Fri, Sep 24, 2010 at 02:38:09PM +0900, Isaku Yamahata wrote:
> On Wed, Sep 22, 2010 at 01:25:59PM +0200, Michael S. Tsirkin wrote:
>
> > > +PCIESlot *pcie_root_init(PCIBus *bus, int devfn, bool multifunction,
> > > + const char *bus_name, pci_map_irq_fn map_irq,
> > > +
On Wed, Sep 22, 2010 at 01:25:59PM +0200, Michael S. Tsirkin wrote:
> > +PCIESlot *pcie_root_init(PCIBus *bus, int devfn, bool multifunction,
> > + const char *bus_name, pci_map_irq_fn map_irq,
> > + uint8_t port, uint8_t chassis, uint16_t slot);
> >
On Wed, Sep 15, 2010 at 02:38:21PM +0900, Isaku Yamahata wrote:
> pcie root port.
>
> Signed-off-by: Isaku Yamahata
> ---
> Changes v2 -> v3:
> - compilation adjustment.
so this is a specific intel root port, lets
name file and rotines appropriately.
> ---
> Makefile.objs |2 +-
> hw/pcie
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