[Qemu-devel] Re: irq latency and tcg

2009-12-12 Thread Blue Swirl
On Wed, Dec 9, 2009 at 2:30 PM, Artyom Tarasenko atar4q...@googlemail.com wrote: 2009/12/7 Blue Swirl blauwir...@gmail.com: On Mon, Dec 7, 2009 at 3:30 PM, Artyom Tarasenko atar4q...@googlemail.com wrote: Can it be that qemu (-system-sparc in my case, but I guess it's more or less similar on

[Qemu-devel] Re: irq latency and tcg

2009-12-12 Thread Paul Brook
According to comment in exec-all.h: /* Deterministic execution requires that IO only be performed on the last instruction of a TB so that interrupts take effect immediately. */ Sparc generator must then violate this assumption. Is the assumption valid also when not using icount and

[Qemu-devel] Re: irq latency and tcg

2009-12-09 Thread Artyom Tarasenko
2009/12/7 Blue Swirl blauwir...@gmail.com: On Mon, Dec 7, 2009 at 3:30 PM, Artyom Tarasenko atar4q...@googlemail.com wrote: Can it be that qemu (-system-sparc in my case, but I guess it's more or less similar on all platforms) reacts to irqs slower than a real hardware due to tcg

[Qemu-devel] Re: irq latency and tcg

2009-12-07 Thread Blue Swirl
On Mon, Dec 7, 2009 at 3:30 PM, Artyom Tarasenko atar4q...@googlemail.com wrote: Can it be that qemu (-system-sparc in my case, but I guess it's more or less similar on all platforms) reacts to irqs slower than a real hardware due to tcg optimizations? I see one test pattern which fails on