On Thu, Oct 18, 2007 at 06:57:19AM -0700, Boy Dfx wrote:
> From what I can see instructions are loaded from memory without a
> clock cycle penalty, but I wanted to be sure.
Yes. Qemu is absolutely useless for performance questions about
real hardware; it does not model any cycles.
--
Daniel Jac
Hello
I'm a newbie in the use of ARM simulators.
I got yesterday a question from my teacher and can't find the answer.
I would like to know weather QEMU simulates a cache miss (cache miss holds a
penalty in terms of clock cycles or clock cycles counted) for an ARM-type core.
>From what I
