On Thu, Oct 26, 2017 at 04:30:57PM +0800, Peter Xu wrote:
> On Mon, Oct 23, 2017 at 10:23:43AM -0700, Prasad Singamsetty wrote:
>
> [...]
>
> > >>Proposal:
> > >>
> > >>We can simply change the VTD_HOST_ADDRESS_WIDTH to 48 bits
> > >>with out any other changes to the code. The current set of
> >
On Mon, Oct 23, 2017 at 10:23:43AM -0700, Prasad Singamsetty wrote:
[...]
> >>Proposal:
> >>
> >>We can simply change the VTD_HOST_ADDRESS_WIDTH to 48 bits
> >>with out any other changes to the code. The current set of
> >>features in the intel iommu emulator code works for q35
> >>machine type a
On 10/22/2017 11:37 PM, Peter Xu wrote:
On Fri, Oct 20, 2017 at 03:54:21PM -0700, Prasad Singamsetty wrote:
On 10/18/2017 8:33 PM, Peter Xu wrote:
On Wed, Oct 18, 2017 at 10:19:31AM -0700, Prasad Singamsetty wrote:
On 10/16/2017 8:56 PM, Peter Xu wrote:
On Mon, Oct 16, 2017 at 10:02:25A
On Fri, Oct 20, 2017 at 03:54:21PM -0700, Prasad Singamsetty wrote:
>
>
> On 10/18/2017 8:33 PM, Peter Xu wrote:
> >On Wed, Oct 18, 2017 at 10:19:31AM -0700, Prasad Singamsetty wrote:
> >>
> >>
> >>On 10/16/2017 8:56 PM, Peter Xu wrote:
> >>>On Mon, Oct 16, 2017 at 10:02:25AM -0700, Prasad Singam
On 10/18/2017 8:33 PM, Peter Xu wrote:
On Wed, Oct 18, 2017 at 10:19:31AM -0700, Prasad Singamsetty wrote:
On 10/16/2017 8:56 PM, Peter Xu wrote:
On Mon, Oct 16, 2017 at 10:02:25AM -0700, Prasad Singamsetty wrote:
On 10/14/2017 8:53 PM, Peter Xu wrote:
On Fri, Oct 13, 2017 at 11:14:03AM
On Wed, Oct 18, 2017 at 10:19:31AM -0700, Prasad Singamsetty wrote:
>
>
> On 10/16/2017 8:56 PM, Peter Xu wrote:
> >On Mon, Oct 16, 2017 at 10:02:25AM -0700, Prasad Singamsetty wrote:
> >>
> >>
> >>On 10/14/2017 8:53 PM, Peter Xu wrote:
> >>>On Fri, Oct 13, 2017 at 11:14:03AM -0600, Alex Williams
On 10/16/2017 8:56 PM, Peter Xu wrote:
On Mon, Oct 16, 2017 at 10:02:25AM -0700, Prasad Singamsetty wrote:
On 10/14/2017 8:53 PM, Peter Xu wrote:
On Fri, Oct 13, 2017 at 11:14:03AM -0600, Alex Williamson wrote:
On Fri, 13 Oct 2017 18:01:44 +0100
"Dr. David Alan Gilbert" wrote:
* Prasad
On Tue, 10/17 11:56, Peter Xu wrote:
> I don't sure I know the reason. Anyway, it originated from one of
> Fam's request for some NVMe testsr
FWIW, I was basically trying to test a driver code under development with 48bit
vIOMMU. I ended up using real hardware and also made the code compatible wi
On Mon, Oct 16, 2017 at 10:02:25AM -0700, Prasad Singamsetty wrote:
>
>
> On 10/14/2017 8:53 PM, Peter Xu wrote:
> >On Fri, Oct 13, 2017 at 11:14:03AM -0600, Alex Williamson wrote:
> >>On Fri, 13 Oct 2017 18:01:44 +0100
> >>"Dr. David Alan Gilbert" wrote:
> >>
> >>>* Prasad Singamsetty (prasad.s
On 10/13/2017 10:14 AM, Alex Williamson wrote:
On Fri, 13 Oct 2017 18:01:44 +0100
"Dr. David Alan Gilbert" wrote:
* Prasad Singamsetty (prasad.singamse...@oracle.com) wrote:
Hi,
I am new to the alias. I have some questions on this subject
and seek some clarifications from the experts in th
On 10/14/2017 8:53 PM, Peter Xu wrote:
On Fri, Oct 13, 2017 at 11:14:03AM -0600, Alex Williamson wrote:
On Fri, 13 Oct 2017 18:01:44 +0100
"Dr. David Alan Gilbert" wrote:
* Prasad Singamsetty (prasad.singamse...@oracle.com) wrote:
Hi,
I am new to the alias. I have some questions on this s
On 10/13/2017 10:01 AM, Dr. David Alan Gilbert wrote:
* Prasad Singamsetty (prasad.singamse...@oracle.com) wrote:
Hi,
I am new to the alias. I have some questions on this subject
and seek some clarifications from the experts in the team.
I ran into a couple of issues when I tried with large co
On Fri, Oct 13, 2017 at 11:14:03AM -0600, Alex Williamson wrote:
> On Fri, 13 Oct 2017 18:01:44 +0100
> "Dr. David Alan Gilbert" wrote:
>
> > * Prasad Singamsetty (prasad.singamse...@oracle.com) wrote:
> > > Hi,
> > >
> > > I am new to the alias. I have some questions on this subject
> > > and s
On Fri, 13 Oct 2017 18:01:44 +0100
"Dr. David Alan Gilbert" wrote:
> * Prasad Singamsetty (prasad.singamse...@oracle.com) wrote:
> > Hi,
> >
> > I am new to the alias. I have some questions on this subject
> > and seek some clarifications from the experts in the team.
> > I ran into a couple of
* Prasad Singamsetty (prasad.singamse...@oracle.com) wrote:
> Hi,
>
> I am new to the alias. I have some questions on this subject
> and seek some clarifications from the experts in the team.
> I ran into a couple of issues when I tried with large configuration
> ( >= 1TB memory, > 255 CPUs) for x
Hi,
I am new to the alias. I have some questions on this subject
and seek some clarifications from the experts in the team.
I ran into a couple of issues when I tried with large configuration
( >= 1TB memory, > 255 CPUs) for x86_64 guest machine.
1. QEMU uses the default value of 40 (TCG_PHYS_AD
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