>>> What is the reason for that? DisasContext itself has a pointer to env.
>>> Can it be used instead?
>>
>> DisasContext shouldn't have that pointer. Some of the decisions during
>> translation are made based on CPU model/features which don't change
>> during execution. Other decisions should be m
>>> - if possible, simcall should become a linux-user target instead
>>
>> simcall is used in freestanding libc provided by Tensilica, I guess
>> primarily to ease OS-less development. I can make it an additional
>> option, but it seems impractical to remove it completely.
>
> Does that still emula
On 30 April 2011 10:06, Blue Swirl wrote:
> On Sat, Apr 30, 2011 at 11:24 AM, Max Filippov wrote:
>> Is it worth keeping patches as small as they are now (as they only
>> reflect development chronology), or maybe it's better to consolidate
>> them on some other basis?
>
> Small patches are nicer
On Sat, Apr 30, 2011 at 11:24 AM, Max Filippov wrote:
>>> Essential ISA parts (like core opcodes, special registers, windowed
>>> registers, exceptions and interrupts) are implemented, other (like
>>> TLB, MMU, caches, coprocessors, rare opcodes) are not, although I'm
>>> planning to implement the
>> Essential ISA parts (like core opcodes, special registers, windowed
>> registers, exceptions and interrupts) are implemented, other (like
>> TLB, MMU, caches, coprocessors, rare opcodes) are not, although I'm
>> planning to implement them if/when needed.
>
> Nice work. What is the status, can th
On Sat, Apr 30, 2011 at 12:08 AM, Max Filippov wrote:
> Hello.
>
> I'm developing support for new qemu target architecture: xtensa [1],
> primarily because AFAIK there's no free/open simulator for this
> architecture.
>
> Essential ISA parts (like core opcodes, special registers, windowed
> regist
Hello.
I'm developing support for new qemu target architecture: xtensa [1],
primarily because AFAIK there's no free/open simulator for this
architecture.
Essential ISA parts (like core opcodes, special registers, windowed
registers, exceptions and interrupts) are implemented, other (like
TLB, MMU
