On Thu, Mar 02, 2023 at 01:37:04PM +, Jonathan Cameron wrote:
> We are missing necessary config write handling for AER emulation in
> the CXL root port. Add it based on pcie_root_port.c
>
> Signed-off-by: Jonathan Cameron
> Reviewed-by: Dave Jiang
> ---
> hw/pci-bridge/cxl_root_port.c | 3 +
We are missing necessary config write handling for AER emulation in
the CXL root port. Add it based on pcie_root_port.c
Signed-off-by: Jonathan Cameron
Reviewed-by: Dave Jiang
---
hw/pci-bridge/cxl_root_port.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/pci-bridge/cxl_root_port.c
