On 15/06/2021 16:44, Richard Henderson wrote:
> On 6/14/21 11:48 PM, Laurent Vivier wrote:
>> Le 26/05/2021 à 03:13, Richard Henderson a écrit :
>>> Sparc v8plus is a sparc64 running a 32-bit ABI.
>>> The significant difference vs sparc32 is that all 64 bits of
>>> the %g and %o registers, plus %xc
On 6/14/21 11:48 PM, Laurent Vivier wrote:
Le 26/05/2021 à 03:13, Richard Henderson a écrit :
Sparc v8plus is a sparc64 running a 32-bit ABI.
The significant difference vs sparc32 is that all 64 bits of
the %g and %o registers, plus %xcc, are saved across interrupts,
context switches, and signal
Le 26/05/2021 à 03:13, Richard Henderson a écrit :
> Sparc v8plus is a sparc64 running a 32-bit ABI.
> The significant difference vs sparc32 is that all 64 bits of
> the %g and %o registers, plus %xcc, are saved across interrupts,
> context switches, and signals.
>
> There's a special marker in th
Sparc v8plus is a sparc64 running a 32-bit ABI.
The significant difference vs sparc32 is that all 64 bits of
the %g and %o registers, plus %xcc, are saved across interrupts,
context switches, and signals.
There's a special marker in the saved %psr value that's used to
indicate that %xcc and the hi
