On 2/12/23 22:24, gaosong wrote:
Hi, Richard
在 2022/12/25 上午1:32, Richard Henderson 写道:
On 12/24/22 00:15, Song Gao wrote:
+union vec_t {
+ int8_t B[LSX_LEN / 8];
+ int16_t H[LSX_LEN / 16];
+ int32_t W[LSX_LEN / 32];
+ int64_t D[LSX_LEN / 64];
+ __int128 Q[LSX_LEN / 128];
Hi, Richard
在 2022/12/25 上午1:32, Richard Henderson 写道:
On 12/24/22 00:15, Song Gao wrote:
+union vec_t {
+ int8_t B[LSX_LEN / 8];
+ int16_t H[LSX_LEN / 16];
+ int32_t W[LSX_LEN / 32];
+ int64_t D[LSX_LEN / 64];
+ __int128 Q[LSX_LEN / 128];
Oh, you can't use __int128
在 2022/12/29 上午11:13, Richard Henderson 写道:
On 12/28/22 17:51, gaosong wrote:
A related question though: does the manual mention whether the fpu
instructions only modify the lower 64 bits, or do the high 64-bits
become zeroed, nanboxed, or unspecified?
Only modify the lower 64bits, the
On 12/28/22 17:51, gaosong wrote:
A related question though: does the manual mention whether the fpu instructions only
modify the lower 64 bits, or do the high 64-bits become zeroed, nanboxed, or unspecified?
Only modify the lower 64bits, the high 64-bits is unpecified.
These two options
在 2022/12/29 上午1:30, Richard Henderson 写道:
On 12/27/22 18:34, gaosong wrote:
The manual says "The lower 64 bits of each vector register overlap
with the floating point register of the same number. In other words
When the basic floating-point instruction is executed to update the
On 12/27/22 18:34, gaosong wrote:
The manual says "The lower 64 bits of each vector register overlap with the floating point
register of the same number. In other words
When the basic floating-point instruction is executed to update the floating-point
register, the low 64 bits of the
在 2022/12/25 上午1:24, Richard Henderson 写道:
On 12/24/22 00:15, Song Gao wrote:
+union fpr_t {
+ uint64_t d;
+ vec_t vec;
+};
+
struct LoongArchTLB {
uint64_t tlb_misc;
/* Fields corresponding to CSR_TLBELO0/1 */
@@ -251,7 +267,7 @@ typedef struct CPUArchState {
On 12/24/22 00:15, Song Gao wrote:
+union vec_t {
+int8_t B[LSX_LEN / 8];
+int16_t H[LSX_LEN / 16];
+int32_t W[LSX_LEN / 32];
+int64_t D[LSX_LEN / 64];
+__int128 Q[LSX_LEN / 128];
Oh, you can't use __int128 directly.
It won't compile on 32-bit hosts.
r~
On 12/24/22 00:15, Song Gao wrote:
+union fpr_t {
+uint64_t d;
+vec_t vec;
+};
+
struct LoongArchTLB {
uint64_t tlb_misc;
/* Fields corresponding to CSR_TLBELO0/1 */
@@ -251,7 +267,7 @@ typedef struct CPUArchState {
uint64_t gpr[32];
uint64_t pc;
-
On 12/24/22 00:15, Song Gao wrote:
+#define LSX_LEN (128)
+typedef union vec_t vec_t;
+union vec_t {
+int8_t B[LSX_LEN / 8];
+int16_t H[LSX_LEN / 16];
+int32_t W[LSX_LEN / 32];
+int64_t D[LSX_LEN / 64];
+__int128 Q[LSX_LEN / 128];
+};
+
+typedef union fpr_t fpr_t;
Signed-off-by: Song Gao
---
linux-user/loongarch64/signal.c | 4 ++--
target/loongarch/cpu.c | 2 +-
target/loongarch/cpu.h | 18 +-
target/loongarch/gdbstub.c | 4 ++--
target/loongarch/machine.c | 2 +-
5 files changed, 23 insertions(+), 7
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