Signed-off-by: Xiaojuan Yang <yangxiaoj...@loongson.cn> Signed-off-by: Song Gao <gaos...@loongson.cn> --- target/loongarch/constant_timer.c | 62 +++++++++++++++++++++++++++++++ target/loongarch/cpu.h | 10 +++++ target/loongarch/meson.build | 1 + 3 files changed, 73 insertions(+) create mode 100644 target/loongarch/constant_timer.c
diff --git a/target/loongarch/constant_timer.c b/target/loongarch/constant_timer.c new file mode 100644 index 0000000000..8477f91f35 --- /dev/null +++ b/target/loongarch/constant_timer.c @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * QEMU LoongArch constant timer support + * + * Copyright (c) 2021 Loongson Technology Corporation Limited + */ + +#include "qemu/osdep.h" +#include "hw/loongarch/loongarch.h" +#include "qemu/timer.h" +#include "cpu.h" + +#define TIMER_PERIOD 10 /* 10 ns period for 100 MHz frequency */ +#define CONSTANT_TIMER_TICK_MASK 0xfffffffffffcUL +#define CONSTANT_TIMER_ENABLE 0x1UL + +uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu) +{ + return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / TIMER_PERIOD; +} + +uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu) +{ + uint64_t now, expire; + + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + expire = timer_expire_time_ns(&cpu->timer); + + return (expire - now) / TIMER_PERIOD; +} + +void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu, + uint64_t value) +{ + CPULoongArchState *env = &cpu->env; + uint64_t now, next; + + env->CSR_TCFG = value; + if (value & CONSTANT_TIMER_ENABLE) { + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + next = now + (value & CONSTANT_TIMER_TICK_MASK) * TIMER_PERIOD; + timer_mod(&cpu->timer, next); + } +} + +void loongarch_constant_timer_cb(void *opaque) +{ + LoongArchCPU *cpu = opaque; + CPULoongArchState *env = &cpu->env; + uint64_t now, next; + + if (FIELD_EX64(env->CSR_TCFG, CSR_TCFG, PERIODIC)) { + now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + next = now + (env->CSR_TCFG & CONSTANT_TIMER_TICK_MASK) * TIMER_PERIOD; + timer_mod(&cpu->timer, next); + } else { + env->CSR_TCFG = FIELD_DP64(env->CSR_TCFG, CSR_TCFG, EN, 0); + } + + env->CSR_ESTAT |= 1 << IRQ_TIMER; + cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD); +} diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 80b03f7bd7..95955bd8df 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -12,6 +12,7 @@ #include "fpu/softfloat-types.h" #include "hw/registerfields.h" #include "cpu-csr.h" +#include "qemu/timer.h" #define TCG_GUEST_DEFAULT_MO (0) @@ -148,6 +149,9 @@ FIELD(CPUCFG20, L3IU_SIZE, 24, 7) extern const char * const regnames[32]; extern const char * const fregnames[32]; +#define N_IRQS 14 +#define IRQ_TIMER 11 + typedef struct CPULoongArchState CPULoongArchState; struct CPULoongArchState { uint64_t gpr[32]; @@ -237,6 +241,7 @@ struct LoongArchCPU { CPUNegativeOffsetState neg; CPULoongArchState env; + QEMUTimer timer; }; #define TYPE_LOONGARCH_CPU "loongarch-cpu" @@ -301,4 +306,9 @@ enum { #define LOONGARCH_CPU_TYPE_NAME(model) model LOONGARCH_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_LOONGARCH_CPU +void loongarch_constant_timer_cb(void *opaque); +uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu); +uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu); +void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu, + uint64_t value); #endif /* LOONGARCH_CPU_H */ diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build index 103f36ee15..6168e910a0 100644 --- a/target/loongarch/meson.build +++ b/target/loongarch/meson.build @@ -17,6 +17,7 @@ loongarch_tcg_ss.add(zlib) loongarch_softmmu_ss = ss.source_set() loongarch_softmmu_ss.add(files( 'machine.c', + 'constant_timer.c', )) loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss]) -- 2.27.0