Re: [RFC v2 08/15] target/riscv: rvb: single-bit instructions

On 12/15/20 8:01 PM, frank.ch...@sifive.com wrote: > +static bool gen_shifti(DisasContext *ctx, arg_shift *a, > +void(*func)(TCGv, TCGv, TCGv)) > +{ > +TCGv source1 = tcg_temp_new(); > +TCGv source2 = tcg_temp_new(); > + > +gen_get_gpr(source1, a->rs1); > +tc

[RFC v2 08/15] target/riscv: rvb: single-bit instructions

From: Kito Cheng Signed-off-by: Kito Cheng Signed-off-by: Frank Chang --- target/riscv/insn32-64.decode | 8 ++ target/riscv/insn32.decode | 9 +++ target/riscv/insn_trans/trans_rvb.c.inc | 90 + target/riscv/translate.c| 102