Re: [RFC v3 02/25] hw/iommu: introduce DualStageIOMMUObject

2020-02-12 Thread David Gibson
On Fri, Jan 31, 2020 at 11:42:06AM +, Liu, Yi L wrote: > Hi David, > > > From: David Gibson [mailto:da...@gibson.dropbear.id.au] > > Sent: Friday, January 31, 2020 11:59 AM > > To: Liu, Yi L > > Subject: Re: [RFC v3 02/25] hw/iommu: introduce DualStageIOMMU

RE: [RFC v3 02/25] hw/iommu: introduce DualStageIOMMUObject

2020-01-31 Thread Liu, Yi L
Hi David, > From: David Gibson [mailto:da...@gibson.dropbear.id.au] > Sent: Friday, January 31, 2020 11:59 AM > To: Liu, Yi L > Subject: Re: [RFC v3 02/25] hw/iommu: introduce DualStageIOMMUObject > > On Wed, Jan 29, 2020 at 04:16:33AM -0800, Liu, Yi L wrote:

Re: [RFC v3 02/25] hw/iommu: introduce DualStageIOMMUObject

2020-01-30 Thread David Gibson
On Wed, Jan 29, 2020 at 04:16:33AM -0800, Liu, Yi L wrote: > From: Liu Yi L > > Currently, many platform vendors provide the capability of dual stage > DMA address translation in hardware. For example, nested translation > on Intel VT-d scalable mode, nested stage translation on ARM SMMUv3, >

[RFC v3 02/25] hw/iommu: introduce DualStageIOMMUObject

2020-01-29 Thread Liu, Yi L
From: Liu Yi L Currently, many platform vendors provide the capability of dual stage DMA address translation in hardware. For example, nested translation on Intel VT-d scalable mode, nested stage translation on ARM SMMUv3, and etc. In dual stage DMA address translation, there are two stages