RE: [PATCH v5 6/7] aspeed/soc: Support GPIO for AST2700 and correct irq 130

2024-09-29 Thread Jamin Lin
Hi Cedric, > Subject: Re: [PATCH v5 6/7] aspeed/soc: Support GPIO for AST2700 and correct > irq 130 > > Hello Jamin, > > On 9/27/24 10:33, Jamin Lin wrote: > > The register set of GPIO have a significant change since AST2700. > > Each GPIO pin has their own individ

Re: [PATCH v5 6/7] aspeed/soc: Support GPIO for AST2700 and correct irq 130

2024-09-27 Thread Cédric Le Goater
Hello Jamin, On 9/27/24 10:33, Jamin Lin wrote: The register set of GPIO have a significant change since AST2700. Each GPIO pin has their own individual control register and users are able to set one GPIO pin’s direction, interrupt enable, input mask and so on in the same one control register.